On Wed, Aug 02, 2023 at 04:37:50PM +0800, Yinbo Zhu wrote:
>
>
> 在 2023/8/2 下午3:50, Conor Dooley 写道:
> > On Wed, Aug 02, 2023 at 03:44:17PM +0800, Yinbo Zhu wrote:
> > > 在 2023/8/2 下午3:22, Conor Dooley 写道:
> > > > On Wed, Aug 02, 2023 at 09:38:34AM +0800, Yinbo Zhu wrote:
> > > > > 在 2023/8/1 下午11:54, Conor Dooley 写道:
> > > > > > On Tue, Aug 01, 2023 at 04:34:30PM +0800, Yinbo Zhu wrote:
> >
> > > > > > > Sorry, I may not have described it clearly before, the ls2k500 was only
> > > > > > > as a example, actually, Loongson GPIO controllers (2k500,2k1000,eg)come
> > > > > > > in multiple variants that are compatible except for certain register
> > > > > > > offset values. So above all offset device property was used to in all
> > > > > > > loongson gpio controller.
> > > > > >
> > > > > > But it would be good to know why they are different. Do they each
> > > > > > support some different features, or was there some other reason for
> > > > > > making controllers like this?
> > > > >
> > > > >
> > > > > There are no other reasons, just differences in these offset addresses.
> > > >
> > > > Huh. Do you have a link to a devicetree for the ls2k500?
> > >
> > >
> > > Yes, there was a link about ls2k500 dts, but that ls2k500 dts has not
> > > yet added a gpio node. this gpio node will be added later.
> >
> > You must have something that you used to test with, no? I don't mind if
> > it is not a patch, but rather is some WIP - I'd just like to see user of
> > the binding :)
>
>
> yes, I have a test, for 2k0500, that gpio dts as follows:
>
> gpio0:gpio@0x1fe10430 {
> compatible = "loongson,ls2k-gpio";
> reg = <0 0x1fe10430 0 0x20>;
> gpio-controller;
> #gpio-cells = <2>;
> interrupt-parent = <&liointc1>;
> ngpios = <64>;
> loongson,gpio-conf-offset = <0>;
> loongson,gpio-out-offset = <0x10>;
> loongson,gpio-in-offset = <0x8>;
> loongson,gpio-inten-offset = <0xb0>;
> loongson,gpio-ctrl-mode = <0x0>;
> ...
> }
>
> gpio1:gpio@0x1fe10450 {
> compatible = "loongson,ls2k-gpio";
> reg = <0 0x1fe10450 0 0x20>;
> gpio-controller;
> #gpio-cells = <2>;
> interrupt-parent = <&liointc1>;
> ngpios = <64>;
> loongson,gpio-conf-offset = <0>;
> loongson,gpio-out-offset = <0x10>;
> loongson,gpio-in-offset = <0x8>;
These 3 are the same for both controllers, no?
Is only the inten-offset a variable?
> loongson,gpio-inten-offset = <0x98>;
These offsets exceed the region that you've got in the reg property for
this controller, do they not?
Is there some sort of "miscellaneous register area" at 0x1FE104E0, or
just those two interrupt registers and nothing else?
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