Re: [PATCH v2 1/2] gpio: dt-bindings: add parsing of loongson gpio offset

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 





在 2023/7/31 下午11:55, Conor Dooley 写道:
On Mon, Jul 31, 2023 at 05:10:58PM +0800, Yinbo Zhu wrote:
Add parsing GPIO configure, input, output, interrupt register offset
address and GPIO control mode support.

This reeks of insufficient use of SoC specific compatibles. Do GPIO
controllers on the same SoC have different register offsets?


Yes,

Where are the users for this?


For example, ls2k500 contains multiple GPIO chips with different
(configure, input, output, interrupt) offset addresses, but all others
are the same.


Cheers,
Conor.


Signed-off-by: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
---
  .../bindings/gpio/loongson,ls-gpio.yaml       | 37 +++++++++++++++++++
  1 file changed, 37 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml b/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml
index fb86e8ce6349..cad67f8bfe6e 100644
--- a/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml
@@ -29,6 +29,33 @@ properties:
gpio-ranges: true + loongson,gpio-conf-offset:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      This option indicate this GPIO configuration register offset address.
+
+  loongson,gpio-out-offset:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      This option indicate this GPIO output register offset address.
+
+  loongson,gpio-in-offset:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      This option indicate this GPIO input register offset address.
+
+  loongson,gpio-ctrl-mode:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      This option indicate this GPIO control mode, where '0' represents
+      bit control mode and '1' represents byte control mode.
+
+  loongson,gpio-inten-offset:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      This option indicate this GPIO interrupt enable register offset
+      address.
+
    interrupts:
      minItems: 1
      maxItems: 64
@@ -39,6 +66,11 @@ required:
    - ngpios
    - "#gpio-cells"
    - gpio-controller
+  - loongson,gpio-conf-offset
+  - loongson,gpio-in-offset
+  - loongson,gpio-out-offset
+  - loongson,gpio-ctrl-mode
+  - loongson,gpio-inten-offset
    - gpio-ranges
    - interrupts
@@ -54,6 +86,11 @@ examples:
        ngpios = <64>;
        #gpio-cells = <2>;
        gpio-controller;
+      loongson,gpio-conf-offset = <0>;
+      loongson,gpio-in-offset = <0x20>;
+      loongson,gpio-out-offset = <0x10>;
+      loongson,gpio-ctrl-mode = <0>;
+      loongson,gpio-inten-offset = <0x30>;
        gpio-ranges = <&pctrl 0 0 15>,
                      <&pctrl 16 16 15>,
                      <&pctrl 32 32 10>,
--
2.20.1





[Index of Archives]     [Linux SPI]     [Linux Kernel]     [Linux ARM (vger)]     [Linux ARM MSM]     [Linux Omap]     [Linux Arm]     [Linux Tegra]     [Fedora ARM]     [Linux for Samsung SOC]     [eCos]     [Linux Fastboot]     [Gcc Help]     [Git]     [DCCP]     [IETF Announce]     [Security]     [Linux MIPS]     [Yosemite Campsites]

  Powered by Linux