On Thu, 25 May 2023 14:02:19 +0300 (EEST) Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx> wrote: > On Thu, 25 May 2023, Hugo Villeneuve wrote: > > > From: Hugo Villeneuve <hvilleneuve@xxxxxxxxxxxx> > > > > Bit SRESET (3) is cleared when a reset operation is completed. Having > > the IOCONTROL register as non-volatile will always read SRESET as 1. > > Therefore mark IOCONTROL register as a volatile register. > > > > Fixes: dfeae619d781 ("serial: sc16is7xx") > > Signed-off-by: Hugo Villeneuve <hvilleneuve@xxxxxxxxxxxx> > > What is the impact of this problem? That is, what doesn't work? I only see > writes to SC16IS7XX_IOCONTROL_REG. If there are no concrete problems > fixed, don't put Fixes tag. Hi, there is a concrete problem when dumping the registers as the value read for bit SRESET is incorrect, but it doesn't impact running code. I can remove the Fixes. Hugo. > > --- > > drivers/tty/serial/sc16is7xx.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c > > index 00054bb49780..a7c4da3cfd2b 100644 > > --- a/drivers/tty/serial/sc16is7xx.c > > +++ b/drivers/tty/serial/sc16is7xx.c > > @@ -488,6 +488,7 @@ static bool sc16is7xx_regmap_volatile(struct device *dev, unsigned int reg) > > case SC16IS7XX_TXLVL_REG: > > case SC16IS7XX_RXLVL_REG: > > case SC16IS7XX_IOSTATE_REG: > > + case SC16IS7XX_IOCONTROL_REG: > > return true; > > default: > > break; > > >