On Tue, Nov 08, 2022 at 03:45:45PM +0000, Larry Lai wrote: > Dear Jones, > > Thank you for spending time to review this code, please check our response below your comment with yellow background. html email will be rejected by the mailing lists. Please resend in plain-text format. thanks, greg k-h
Re: 回覆: [PATCH 1/5] mfd: Add support for UP board CPLD/FPGA
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- Subject: Re: 回覆: [PATCH 1/5] mfd: Add support for UP board CPLD/FPGA
- From: "gregkh@xxxxxxxxxxxxxxxxxxx" <gregkh@xxxxxxxxxxxxxxxxxxx>
- Date: Tue, 8 Nov 2022 16:53:21 +0100
- In-reply-to: <SG2PR06MB37422173908A6584B3D6D349F93F9@SG2PR06MB3742.apcprd06.prod.outlook.com>
- References: <20221019022450.16851-1-larry.lai@yunjingtech.com> <20221019022450.16851-2-larry.lai@yunjingtech.com> <Y1/ik4XGNWsOg5KH@google.com> <SG2PR06MB37422173908A6584B3D6D349F93F9@SG2PR06MB3742.apcprd06.prod.outlook.com>
- References:
- [PATCH 0/5] Add support control UP board CPLD/FPGA pin control
- From: chengwei
- [PATCH 1/5] mfd: Add support for UP board CPLD/FPGA
- From: chengwei
- Re: [PATCH 1/5] mfd: Add support for UP board CPLD/FPGA
- From: Lee Jones
- [PATCH 0/5] Add support control UP board CPLD/FPGA pin control
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