This is a continuation of the previously applied PWM LPSS cleanup series. Now, we would like to enable PWM optional feature that may be embedded into Intel pin control IPs (starting from Sky Lake platforms). I would like to route this via Intel pin control tree with issuing an immutable branch for both PINCTRL and PWM subsystems, but I'm open for other suggestions. Hans, I dared to leave your Rb tags, however the patches are slighly differ, because of the Uwe's suggestion on how to handle the missing headers. I hope you is okay with that. If not, please comment what must be ammended then. Changelog v2: - added tag (Mika) - added base-commit to the series, to make sure LKP can test it Cc: Hans de Goede <hdegoede@xxxxxxxxxx> Cc: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx> Andy Shevchenko (6): pwm: Add a stub for devm_pwmchip_add() pwm: lpss: Rename MAX_PWMS --> LPSS_MAX_PWMS pwm: lpss: Include headers we are direct user of pwm: lpss: Allow other drivers to enable PWM LPSS pwm: lpss: Add pwm_lpss_probe() stub pinctrl: intel: Enumerate PWM device when community has a capabilitty drivers/pinctrl/intel/pinctrl-intel.c | 29 +++++++++++++ drivers/pwm/pwm-lpss.c | 2 +- drivers/pwm/pwm-lpss.h | 34 ++++----------- .../linux/platform_data/x86}/pwm-lpss.h | 41 ++++++++----------- include/linux/pwm.h | 5 +++ 5 files changed, 61 insertions(+), 50 deletions(-) copy {drivers/pwm => include/linux/platform_data/x86}/pwm-lpss.h (51%) base-commit: 3886bc3523db24814c98c57d74fe66d7a21bf40b -- 2.35.1