Re: [PATCH v6 1/1] gpio: mpfs: add polarfire soc gpio support

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Wed, 2022-08-31 at 15:19 +0200, Linus Walleij wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
> 
> On Tue, Aug 30, 2022 at 6:51 AM <Lewis.Hanly@xxxxxxxxxxxxx> wrote:
> 
> > We had looked at the bpgpio_init, our controller is not fully
> > memory
> > mapped to support the bgpio_init() and get all routines for free.
> > While we have in/out and intr (interrupt state) 32-bit registers,
> > we
> > would not get as much free as other generic memory mapped
> > controllers.
> 
> You're not really saying what the problem is?
> 
> Is it that some registers are not one-bit-indexed from 0 per GPIO?
Yes some of the registers are not one-bit-indexed per GPIO and for this
reason we had not implemented bgpio_init().
> 
> Yours,
> Linus Walleij




[Index of Archives]     [Linux SPI]     [Linux Kernel]     [Linux ARM (vger)]     [Linux ARM MSM]     [Linux Omap]     [Linux Arm]     [Linux Tegra]     [Fedora ARM]     [Linux for Samsung SOC]     [eCos]     [Linux Fastboot]     [Gcc Help]     [Git]     [DCCP]     [IETF Announce]     [Security]     [Linux MIPS]     [Yosemite Campsites]

  Powered by Linux