Re: [PATCH v4 1/2] pinctrl: ocelot: Fix pincfg for lan966x

[Andy Shevchenko <andy.shevchenko@xxxxxxxxx>]

On Tue, Jul 12, 2022 at 9:46 PM Horatiu Vultur
<horatiu.vultur@xxxxxxxxxxxxx> wrote:
>
> The blamed commit introduce support for lan966x which use the same
> pinconf_ops as sparx5. The problem is that pinconf_ops is specific to
> sparx5. More precisely the offset of the bits in the pincfg register are
> different and also lan966x doesn't have support for
> PIN_CONFIG_INPUT_SCHMITT_ENABLE.
>
> Fix this by making pinconf_ops more generic such that it can be also
> used by lan966x. This is done by introducing 'ocelot_pincfg_data' which
> contains the offset and what is supported for each SOC.

Looks better, my comments below.

...

> +               const struct ocelot_pincfg_data *opd = info->pincfg_data;

This one...

...

> @@ -1425,17 +1436,20 @@ static int ocelot_pinconf_get(struct pinctrl_dev *pctldev,

...can also be applied here...

...

>                 case PIN_CONFIG_BIAS_PULL_DOWN:
>                         arg = (param == PIN_CONFIG_BIAS_DISABLE) ? 0 :
> -                       (param == PIN_CONFIG_BIAS_PULL_UP) ? BIAS_PU_BIT :
> -                       BIAS_PD_BIT;
> +                       (param == PIN_CONFIG_BIAS_PULL_UP) ? info->pincfg_data->pu_bit :
> +                       info->pincfg_data->pd_bit;

...which in particular may help to sort out this indentation mess.

-- 
With Best Regards,
Andy Shevchenko