Re: [PATCH v3 15/21] pinctrl: renesas: r8a779g0: add missing CANFD5_B

[Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>]

Hi Morimoto-san,

On Tue, Jun 14, 2022 at 8:00 AM Kuninori Morimoto
<kuninori.morimoto.gx@xxxxxxxxxxx> wrote:
> From: Kuninori Morimoto <kuninori.morimoto.gx@xxxxxxxxxxx>
>
> This patch adds missing CANFD5_B
>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@xxxxxxxxxxx>

Thanks for your patch!

> --- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
> +++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
> @@ -299,8 +299,8 @@
>  #define IP0SR1_31_28   FM(MSIOF0_SS1)          FM(HRX1_X)              FM(RX1_X)       F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
>
>  /* IP1SR1 */           /* 0 */                 /* 1 */                 /* 2 */         /* 3            4        5        6        7        8        9        A        B        C        D        E        F */
> -#define IP1SR1_3_0     FM(MSIOF0_SYNC)         FM(HCTS1_X_N)           FM(CTS1_X_N)    F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
> -#define IP1SR1_7_4     FM(MSIOF0_TXD)          FM(HRTS1_X_N)           FM(RTS1_X_N)    F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
> +#define IP1SR1_3_0     FM(MSIOF0_SYNC)         FM(HCTS1_X_N)           FM(CTS1_X_N)    FM(CANFD5_B_TX) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)

CANFD5_TX_B (everywhere)

> +#define IP1SR1_7_4     FM(MSIOF0_TXD)          FM(HRTS1_X_N)           FM(RTS1_X_N)    FM(CANFD5_B_RX) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)

CANFD5_RX_B (everywhere)

>  #define IP1SR1_11_8    FM(MSIOF0_SCK)          FM(HSCK1_X)             FM(SCK1_X)      F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
>  #define IP1SR1_15_12   FM(MSIOF0_RXD)          F_(0, 0)                F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
>  #define IP1SR1_19_16   FM(HTX0)                FM(TX0)                 F_(0, 0)        F_(0, 0)        F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)

> @@ -1498,6 +1500,15 @@ static const unsigned int canfd5_data_mux[] = {
>         CANFD5_TX_MARK, CANFD5_RX_MARK,
>  };
>
> +/* - CANFD5_B ----------------------------------------------------------------- */
> +static const unsigned int canfd5_b_data_pins[] = {

canfd5_data_b_pins etc.

> +       /* CANFD5_B_TX, CANFD5_B_RX */
> +       RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 9),
> +};

> @@ -2912,6 +2928,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
>         SH_PFC_FUNCTION(canfd3),
>         SH_PFC_FUNCTION(canfd4),
>         SH_PFC_FUNCTION(canfd5),
> +       SH_PFC_FUNCTION(canfd5_b),

Please drop this, as it is not needed.

>         SH_PFC_FUNCTION(canfd6),
>         SH_PFC_FUNCTION(canfd7),
>         SH_PFC_FUNCTION(can_clk),

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds