On Monday, March 22, 2021 5:20 AM, <nikita.shubin@xxxxxxxxxxx> wrote: > Showing only ports A, F and no interrupt capable C: Are you just going to drop the other GPIO ports? The EP93xx has eight 8-bit ports total (Ports A-H). Only 3 port support interrupts: A B and F. Posts A and B share a single interrupt and port F has an interrupt for each pin. Depending on the chip type (01, 02, 07, 12, or 15) not all the GPIOs are pinned out due to the chip pin count. But the registers exist so the current GPIO support always registers all the ports. Note that the GPIO banks are registered a bit goofy, Ports C and F are not in order. They have been that way since the original Cirrus "crater" code base. If I remember correctly this was somewhere back in the 2.6.x kernel. Please make sure the GPIO numbers stay the same so that any userspace code does not break. Port A - GPIO[0-7] <- interrupt capable Port B - GPIO[8-15] <- interrupt capable Port F - GPIO[16-23] <- interrupt capable Port D - GPIO[24-31] Port E - GPIO[32-39] Port C - GPIO[40-47] Port G - GPIO[48-55] Port H - GPIO[56-63] I look forward to seeing patches. Hartley