On Wed, Oct 14, 2020 at 01:46:37PM +0300, Andy Shevchenko wrote: > 2 kOhm bias was never an option in Intel GPIO hardware, the available > matrix is: > > 000 none > 001 1 kOhm (if available) > 010 5 kOhm > 100 20 kOhm > > As easy to get the 3 resistors are gated separately and according to > parallel circuits calculations we may get combinations of the above where > the result is always strictly less than minimal resistance. Hence, > additional values can be: > > 011 ~833.3 Ohm > 101 ~952.4 Ohm > 110 ~4 kOhm > 111 ~800 Ohm > > That said, convert TERM definitions to be the bit masks to reflect the above. > > While at it, enable the same setting for pull down case. > > Fixes: 7981c0015af2 ("pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support") > Cc: Jamie McClymont <jamie@xxxxxxxxxx> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> Acked-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx>