Re: [RFC v2] x86: Select HARDIRQS_SW_RESEND on x86

[Thomas Gleixner <tglx@xxxxxxxxxxxxx>]

Hans,

Hans de Goede <hdegoede@xxxxxxxxxx> writes:
>
> The Intel GPIO controllers do not allow implementing irq_retrigger without
> emulating it in software, at which point we are better of just using the
> generic HARDIRQS_SW_RESEND mechanism rather then re-implementing software
> emulation for this separately in aprox. 14 different pinctrl drivers.

Indeed.

> I'm sending this out as a RFC since I'm not %100 sure this is the best
> solution and it seems like a somewhat big change to make.

It's not that bad. The only affected interrupt chips on x86 should be
secondary interrupt chips like the GPIO controller.

ioapic/msi/... have irq_retrigger() functionality, so it won't do the
software resend.

I just need to stare at the legacy PIC and the virt stuff.

> Also maybe we should add a Cc: stable@xxxxxxxxxxxxxxx ??? This seems like
> somewhat a big change for that but it does solve some real issues...

Yes. Let me stare at the couple of weird irqchips which might get
surprised. I'll teach them not to do that :)

Thanks,

        tglx