On 11.06.19 16:58, Alessandro Rubini wrote: Hi, > This FMC (fpga mezzanine carrier) is a "slot" for peripheral boards. > Like shields for beaglebone or such stuff. So there is a board > (and our own are actually pci-x and vme) with the FPGA, and the pins > are carried to this "mezzanine" where the I/O happens. The mezzanine > is usually just dumb, but it has the mandatory eeprom. Ah, the fpga directly terminates w/ pcix or vme ? Okay, now I'm begining to get a picture ... So, from *logical* point of view (leaving aside the physical aspects), we have either pcix or vme cards, carrying an eepromp and an fpga ? The i2c and gpio controllers are also implemented in the fpga ? > So, our "fine delay" board, that can timestamp pulses and generate > other pulses at precise times) can plug in both the pcix and vme carrier. Do the bitfiles differ between pcix and vme case ? > The tow major ones, IIUC, are (1) the same mezzanine would require > different bitstreams according to external information and (2) the > fpga binary itself my expose different "devices" where a generalized > driver would benefit, instead of a mezzanine-specific driver. Have you already tried the MFD approach, where a board (in this case: bitfile) specific driver instantiates several generic ones ? --mtx -- Enrico Weigelt, metux IT consult Free software and Linux embedded engineering info@xxxxxxxxx -- +49-151-27565287