Re: [PATCH] RFC: fmc: Try to convert to GPIO descriptors

[Alessandro Rubini <rubini@xxxxxxxxx>]

> Do you (or @Federico) recall the original design goals ?

Sure.

This FMC (fpga mezzanine carrier) is a "slot" for peripheral boards.
Like shields for beaglebone or such stuff.  So there is a board
(and our own are actually pci-x and vme) with the FPGA, and the pins
are carried to this "mezzanine" where the I/O happens. The mezzanine
is usually just dumb, but it has the mandatory eeprom.

So, our "fine delay" board, that can timestamp pulses and generate
other pulses at precise times) can plug in both the pcix and vme carrier.

The bus abstraction filled nicely in my opinion. The "spec" and "svec"
(simple pcix/vme carriers) drivers would register the device, named
according to the eeprom contents, and the driver was the same
irrespective of the carrier.  The drivers for spec and svec (or the
mezzanine) were not upstreamed, but the mechanism was, including
software-only examples of how to use it, in the hope others would find
it useful.  Back then there was no generalized way to load fpga
binaries, so we had our own, based on firmware loader.

Then things went more complex, and federico started to have issues.
The tow major ones, IIUC, are (1) the same mezzanine would require
different bitstreams according to external information and (2) the
fpga binary itself my expose different "devices" where a generalized
driver would benefit, instead of a mezzanine-specific driver.
 
> Leaving aside the purely electrical / mechanical aspects, why not
> just using either pcix or vme directly ?

pcix and vme hosted the carrier. Much like an USB controller can either
be PCI or memory-mapped, but the devices it register have a driver that
is irrespective of this detail.

/alessandro