On Sat, Feb 24, 2018 at 12:44 PM, Baolin Wang <baolin.wang@xxxxxxxxxx> wrote: > The Spreadtrum PMIC EIC controller contains only one bank of debounce EIC, > and this bank contains 16 EICs. Each EIC can only be used as input mode, > as well as supporting the debounce and the capability to trigger interrupts > when detecting input signals. > +/* > + * These registers are modified under the irq bus lock and cached to avoid > + * unnecessary writes in bus_sync_unlock. > + */ > +enum { REG_IEV, REG_IE, REG_TRIG, CACHE_NR_REGS }; One item per line. > +static int sprd_pmic_eic_direction_input(struct gpio_chip *chip, > + unsigned int offset) > +{ > + /* EICs are always input, nothing need to do here. */ > + return 0; > +} > + > +static void sprd_pmic_eic_set(struct gpio_chip *chip, unsigned int offset, > + int value) > +{ > + /* EICs are always input, nothing need to do here. */ > +} Remove both. Look at what GPIO core does. > + value |= debounce / 1000; Possible overflow. > + for (n = 0; n < chip->ngpio; n++) { > + if (!(BIT(n) & val)) for_each_set_bit(). At some point you may need just to go across lib/ in the kernel and see what we have there. -- With Best Regards, Andy Shevchenko -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html