Re: [PATCH] pinctrl: sh-pfc: r8a7795: Rename RTS{0,1,3,4}# pin function definitions

[Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>]

Hi Kaneko-san,

On Thu, Nov 16, 2017 at 3:58 PM, Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx> wrote:
> From: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
>
> This patch renames the pin function macro definitions of the GPSR and
> IPSR registers value for the RTS{0,1,3,4}# pin.
>
> This is a correction because GPSR and IPSR register specification for
> R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual
> Rev.0.54E.

Thanks for your patch!

> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx>

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in sh-pfc-for-v4.16, after dropping the remaining "_TANS"
from comments.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
--
To unsubscribe from this list: send the line "unsubscribe linux-gpio" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html