On Fri, Nov 17, 2017 at 03:35:18PM +0200, Mika Westerberg wrote: > > pin 18 (GPIO_18) GPIO 0x40900100 0x00024075 Hmm, If I decode 0x40900100 correctly PADCFG0_GPIROUTIOXAPIC (BIT 20) flag is set for the pin. This means the interrupt is routed to IO-APIC instead. Now, we do clear that flag along with the others when the GPIO is requested through gpio_request() but in this case we go through irqchip instead so the flag is not cleared. I wonder if the following patch changes anything? diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c index 71df0f70b61f..06af096f5768 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.c +++ b/drivers/pinctrl/intel/pinctrl-intel.c @@ -939,6 +939,10 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned type) value &= ~(PADCFG0_RXEVCFG_MASK | PADCFG0_RXINV); + /* Disable SCI/SMI/NMI generation */ + value &= ~(PADCFG0_GPIROUTIOXAPIC | PADCFG0_GPIROUTSCI); + value &= ~(PADCFG0_GPIROUTSMI | PADCFG0_GPIROUTNMI); + if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { value |= PADCFG0_RXEVCFG_EDGE_BOTH << PADCFG0_RXEVCFG_SHIFT; } else if (type & IRQ_TYPE_EDGE_FALLING) { -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html