Re: [PATCH 2/9] pinctrl: sh-pfc: r8a7795: Fix MOD_SEL2 bit26 to 0x0 when using SCK5_A

[Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>]

On Fri, Jul 28, 2017 at 1:41 PM, Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx> wrote:
> From: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
>
> This patch fixes the implementation incorrect of MOD_SEL2 bit26 value
> when SCK5_A pin function is selected for IPSR16 bit[31:28].
>
> This is a correction to the incorrect implementation of MOD_SEL register
> pin assignment for R8A7795 ES2.0 SoC specification of R-Car Gen3 Hardware
> User's Manual Rev.0.51E or later.
>
> Fixes: 12f5d9a1dc7f ("pinctrl: sh-pfc: r8a7795: Replace for Renesas R8A7795 ES2.0 SoC")

That commit is not in upstream. The proper one is:
Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for
R-Car H3 ES2.0")

> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@xxxxxxxxxxx>
> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx>

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>

i.e. will queue in sh-pfc-for-v4.14 with the above fixed.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

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                                -- Linus Torvalds
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