On Tue, Aug 1, 2017 at 4:04 PM, Dong Aisheng <aisheng.dong@xxxxxxx> wrote: > The Rapid General-Purpose Input and Output with 2 Ports (RGPIO2P) > on MX7ULP is similar to GPIO on Vibrid. But unlike Vibrid, the > RGPIO2P has an extra Port Data Direction Register (PDDR) used > to configure the individual port pins for input or output. > > We introduce a bool have_paddr with fsl_gpio_soc_data data > to distinguish this differences. And we support getting the output > status by checking the GPIO direction in PDDR. > > Cc: Linus Walleij <linus.walleij@xxxxxxxxxx> > Cc: Alexandre Courbot <gnurou@xxxxxxxxx> > Cc: Shawn Guo <shawnguo@xxxxxxxxxx> > Cc: Stefan Agner <stefan@xxxxxxxx> > Cc: Fugang Duan <fugang.duan@xxxxxxx> > Cc: Peter Chen <peter.chen@xxxxxxx> > Signed-off-by: Dong Aisheng <aisheng.dong@xxxxxxx> > > --- > ChangeLog: > v1->v2: > * remove flags and use bool have_paddr instead Patch applied. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html