RE: Renesas RZ/A1 pin and gpio controller

[Chris Brandt <Chris.Brandt@xxxxxxxxxxx>]

Hi Jacopo,

On Monday, February 20, 2017, Jacopo Mondi wrote:
> Hello,
>    this is the first submission of combined GPIO and pin controller driver
> for Renesas RZ/A1 SoC.
> 
> Compared to my RFC series on the same subject, this new implementation
> supports a single SoC. If more devices with a similar pin controller will
> arrive later, we will consider supporting them through this driver.
> 
> The series adds the driver itself and register the pincontroller in dtsi.
> The pin controller hardware supports 12 ports, each of them is also a gpio
> controller.
> 
> The series makes use of pinctrl and pinmux generic function currently
> available in Linus Walleij's linux-pinctrl.git tree.
> 
> Testing done veryfing functionalities of hardware modules enabled in
> device tree (SCIF2 for serial output, RIIC for accessing an internal
> eeprom chip and user visible leds).
> Gpio have been also verified using a i2c-gpio device in place of the
> native RIIC one to access the same eeprom device.


Functionally, I tested these patches on an RZ/A1H RSK board (after modifying the DT for the RSK vs the GENMAI board).

The following worked fine:
 * SCIF
 * I2C
 * SDHI
 * Ethernet

  (The trick is you have to know what pins need to be set as bi-directional)


I will look over the code and provide feedback separately.

Cheers

Chris

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