Hello, sorry if I'm sending 2 patches on top of an RFC series with comments still pending, but these patches enabled me to properly test pin configuration sequence in order to access the internal EEPROM through RIIC2 interface on pins 1_4 and 1_5. The outcome is a bugfix to RZ/A1 pincontroller driver which [2/2] applies on. When sending v2 of the whole series I'll probably squash these, but if someone is testing the RFC series I wanted to make sure he does not waste his time with a broken driver. Thanks j Jacopo Mondi (2): arm: dts: genmai: Configure RIIC2 pins pinctrl: rz-pfc: Fix RZ/A1 pin function configuration arch/arm/boot/dts/r7s72100-genmai.dts | 8 ++++- drivers/pinctrl/rz-pfc/pinctrl-rza1.c | 55 +++++++++++++++++++++++------------ 2 files changed, 43 insertions(+), 20 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html