Re: [PATCH 0/5] pinctrl: cherryview: fixes and enhancements

[Linus Walleij <linus.walleij@xxxxxxxxxx>]

On Thu, Jun 2, 2016 at 11:55 PM, Dan O'Donovan <dan@xxxxxxxxxx> wrote:

> This series includes a number of fixes and enhancements for the
> Cherryview pinctrl/gpio driver, developed during integration on the
> UP Board (based on the Intel X5-Z8350 "Cherry Trail" Atom SoC).
>
> Of particular note is a workaround for a documented silicon bug which
> causes data corruption of concurrent accesses to the GPIO controller
> registers on this SoC.
>
> Other patches include clean-up of checkpatch warnings, implementation
> of additional pin config functions and options, and a fix for a loss
> of pin config register state that can occur when switching in and out
> of GPIO pin mode.

Nice, but waiting for a revised patch set fixing Mika's comments.

Yours,
Linus Walleij
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