On Monday 25 April 2016 11:06 AM, Alexandre Courbot wrote:
Sorry, just realized I commented on v3...
On Fri, Apr 22, 2016 at 7:09 PM, Laxman Dewangan <ldewangan@xxxxxxxxxx> wrote:
+ spinlock_t dbc_lock[4]; /* Lock for updating debounce count register */
I'm nit'ing here, but maybe one spinlock shared by all ports would be
enough? (the same would apply to lvl_lock, so feel free to do this as
a separate patch) I don't think we expect *that* many concurrent
accesses, do we?
Really no, but to make the stuff uniform, it should be fine here. If the
registers are not conflicting then do not make under same lock.
spin_lock_irqsave(bank->dbc_lock[port], flags);
if (bank->dbc_cnt[port] < debounce_ms) {
tegra_gpio_writel(tgi, debounce_ms, GPIO_DBC_CNT(tgi, offset));
bank->dbc_cnt[port] = debounce_ms;
}
spin_unlock_irqrestore(&bank->dbc_lock[port], flags);
Which is nicer to the eyes.
OK, this also looks fine. As I am goign to respin this for V5 (for gc as
instance rather than pointer), I will take care of it.
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