[PATCH v3 2/7] dt-bindings: pinctrl: renesas: Document RZ/G3E SoC

[Biju Das <biju.das.jz@xxxxxxxxxxxxxx>]

Add documentation for the pin controller found on the Renesas RZ/G3E
(R9A09G047) SoC. The RZ/G3E PFC is similar to the RZ/V2H SoC but has more
pins(P00-PS3).

Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
---
v2->v3:
 * Updated the macros with hardware indices in the hardware manual.
 * The changes are trivial, so retained ack tag from Conor.
v1->v2:
 * Fixed the warnings reported by bot.
---
 .../pinctrl/renesas,rzg2l-pinctrl.yaml        |  7 +++++--
 include/dt-bindings/pinctrl/rzg2l-pinctrl.h   | 19 +++++++++++++++++++
 2 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
index a1805b6e3f63..768bb3c2b456 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
@@ -26,6 +26,7 @@ properties:
               - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
               - renesas,r9a07g044-pinctrl # RZ/G2{L,LC}
               - renesas,r9a08g045-pinctrl # RZ/G3S
+              - renesas,r9a09g047-pinctrl # RZ/G3E
               - renesas,r9a09g057-pinctrl # RZ/V2H(P)
 
       - items:
@@ -125,7 +126,7 @@ additionalProperties:
         drive-push-pull: true
         renesas,output-impedance:
           description:
-            Output impedance for pins on the RZ/V2H(P) SoC. The value provided by this
+            Output impedance for pins on the RZ/{G3E,V2H(P)} SoC. The value provided by this
             property corresponds to register bit values that can be set in the PFC_IOLH_mn
             register, which adjusts the drive strength value and is pin-dependent.
           $ref: /schemas/types.yaml#/definitions/uint32
@@ -142,7 +143,9 @@ allOf:
       properties:
         compatible:
           contains:
-            const: renesas,r9a09g057-pinctrl
+            enum:
+              - renesas,r9a09g047-pinctrl
+              - renesas,r9a09g057-pinctrl
     then:
       properties:
         resets:
diff --git a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
index c70308961dfa..ab6f71d9504d 100644
--- a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
+++ b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
@@ -24,16 +24,35 @@
 #define PORT_P9		9
 #define PORT_PA		10
 #define PORT_PB		11
+#define PORT_PC		12
+#define PORT_PD		13
+#define PORT_PE		14
+#define PORT_PF		15
+#define PORT_PG		16
+#define PORT_PH		17
+#define PORT_PI		18
+#define PORT_PJ		19
+#define PORT_PK		20
+#define PORT_PL		21
+#define PORT_PM		22
+#define PORT_PN		23
+#define PORT_PO		24
+#define PORT_PP		25
+#define PORT_PQ		26
+#define PORT_PR		27
+#define PORT_PS		28
 
 /*
  * Create the pin index from its bank and position numbers and store in
  * the upper 16 bits the alternate function identifier
  */
 #define RZG2L_PORT_PINMUX(b, p, f)	((b) * RZG2L_PINS_PER_PORT + (p) | ((f) << 16))
+#define RZG3E_PORT_PINMUX(b, p, f)	RZG2L_PORT_PINMUX(PORT_P##b, p, f)
 #define RZV2H_PORT_PINMUX(b, p, f)	RZG2L_PORT_PINMUX(PORT_P##b, p, f)
 
 /* Convert a port and pin label to its global pin index */
 #define RZG2L_GPIO(port, pin)	((port) * RZG2L_PINS_PER_PORT + (pin))
+#define RZG3E_GPIO(port, pin)	RZG2L_GPIO(PORT_P##port, pin)
 #define RZV2H_GPIO(port, pin)	RZG2L_GPIO(PORT_P##port, pin)
 
 #endif /* __DT_BINDINGS_RZG2L_PINCTRL_H */
-- 
2.43.0