[PATCH v3 0/7] Add RZ/G3E pinctrl support

[Biju Das <biju.das.jz@xxxxxxxxxxxxxx>]

Add pin controller support for the Renesas RZ/G3E(R9A09G047) SoC. The
RZ/G3E PFC is similar to the RZ/V2H SoC but has more pins(P00-PS3).
The port number on both RZ/V2H and RZ/G3E is alpha-numeric compared to
the number on the other SoCs. So added support for defining alpha-numeric
port names.

v2->v3:
 * Added alpha-numerical port name support to both RZ/V2H and RZ/G3E.
 * Added PORT_P* macros based on PFC_P_mn offset and RZ{G3E,V2H}_*
   macros for defining port names in DT.  
 * Collected tags.
 * Updated r9a09g057_variable_pin_cfg table replacing port 11 with PORT_PB.
 * Replaced macros WDTUDF_CA->WDTUDFCA and WDTUDF_CM->WDTUDFCM.
 * Replaced macro QSD0_*->SD0*.
 * Updated gpio range from 176->232 to match the port number based
   on hardware indices.
v1->v2:
 * Updated typo of the patch header RZ/G2L->RZ/G3E
 * Fixed the binding warnings reported by bot.

Biju Das (7):
  dt-bindings: pinctrl: renesas: Add alpha-numerical port support for
    RZ/V2H
  dt-bindings: pinctrl: renesas: Document RZ/G3E SoC
  pinctrl: renesas: rzg2l: Update r9a09g057_variable_pin_cfg table
  pinctrl: renesas: rzg2l: Add support for RZ/G3E SoC
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Replace RZG2L macros
  arm64: dts: renesas: r9a09g047: Add pincontrol node
  arm64: dts: renesas: r9a09g047: Add scif pincontrol

 .../pinctrl/renesas,rzg2l-pinctrl.yaml        |   7 +-
 arch/arm64/boot/dts/renesas/r9a09g047.dtsi    |  13 ++
 .../boot/dts/renesas/r9a09g047e57-smarc.dts   |  13 ++
 .../dts/renesas/r9a09g057h44-rzv2h-evk.dts    |  34 ++--
 drivers/pinctrl/renesas/Kconfig               |   1 +
 drivers/pinctrl/renesas/pinctrl-rzg2l.c       | 184 +++++++++++++++++-
 include/dt-bindings/pinctrl/rzg2l-pinctrl.h   |  35 ++++
 7 files changed, 262 insertions(+), 25 deletions(-)

-- 
2.43.0