Hi Geert, hi Claudiu, Thanks for your feedback! > From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> > Sent: Wednesday, October 9, 2024 11:23 AM > To: Claudiu.Beznea <claudiu.beznea@xxxxxxxxx> > Cc: Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx>; Linus Walleij <linus.walleij@xxxxxxxxxx>; Geert > Uytterhoeven <geert+renesas@xxxxxxxxx>; linux-renesas-soc@xxxxxxxxxxxxxxx; linux-gpio@xxxxxxxxxxxxxxx; > linux-kernel@xxxxxxxxxxxxxxx; Chris Paterson <Chris.Paterson2@xxxxxxxxxxx>; Biju Das > <biju.das.jz@xxxxxxxxxxxxxx>; Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> > Subject: Re: [PATCH v2 1/5] pinctrl: renesas: rzg2l: Remove RZG2L_TINT_IRQ_START_INDEX > > Hi Claudiu, > > On Wed, Oct 9, 2024 at 10:00 AM claudiu beznea <claudiu.beznea@xxxxxxxxx> wrote: > > On 30.09.2024 17:52, Fabrizio Castro wrote: > > > The RZ/V2H(P) has 16 IRQ interrupts, while every other platforms > > > has 8, and this affects the start index of TINT interrupts > > > (1 + 16 = 17, rather than 1 + 8 = 9). > > > Macro RZG2L_TINT_IRQ_START_INDEX cannot work anymore, replace > > > it with a new member within struct rzg2l_hwcfg. > > > > > > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx> > > > > Tested-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx> > > Thanks! > > > > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c > > > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > > > > @@ -251,6 +250,7 @@ enum rzg2l_iolh_index { > > > * @func_base: base number for port function (see register PFC) > > > * @oen_max_pin: the maximum pin number supporting output enable > > > * @oen_max_port: the maximum port number supporting output enable > > > + * @tint_start_index: the start index for the TINT interrupts > > > */ > > > struct rzg2l_hwcfg { > > > const struct rzg2l_register_offsets regs; > > > @@ -262,6 +262,7 @@ struct rzg2l_hwcfg { > > > u8 func_base; > > > u8 oen_max_pin; > > > u8 oen_max_port; > > > + unsigned int tint_start_index; > > > > Maybe you can use u16 (even u8 is enough at the moment) and add it a bit > > above (if u16 or even if unsigned int) to avoid any padding, if any. > > Good catch, I had missed that struct rzg2l_register_offsets is 16-bit > aligned ;-) > > I will change it to u16 and move it up while applying. Thank you both. Kind regards, Fab > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds