Re: [PATCH 3/6] dt-bindings: pinctrl: Add fsl,ls1012a-pinctrl yaml file

[Krzysztof Kozlowski <krzk@xxxxxxxxxx>]

On 27/08/2024 18:51, David Leonard wrote:
>>> +properties:
>>> +  compatible:
>>> +    const: fsl,ls1012a-pinctrl
>>> +
>>> +  reg:
>>> +    description: Specifies the base address of the PMUXCR0 register.
>>> +    maxItems: 2
>>
>> Instead list and describe the items.
> 
> Changed to
> 
>     reg:
>       items:
>         - description: Physical base address of the PMUXCR0 register.
>         - description: Size of the PMUXCR0 register (4).
> 
> Is this what you meant?

Almost, second reg is not a size. You claim there are two IO address
spaces. Each address space contains base address and size. Look at other
bindings how they do it.



> 
>>> +
>>> +  big-endian:
>>> +    description: If present, the PMUXCR0 register is implemented in big-endian.
>>
>> Why is this here? Either it is or it is not?
> 
> You're right. Changed to
> 
>     big-endian: true
> 
> (This also lead to some code simplification)

OK, but I still wonder why is it here. Without it the hardware will work
in little-endian?

> 


Best regards,
Krzysztof