Re: [PATCH 1/2] gpio-stp-xway: Fix enabling the highest bit of the PHY LEDs

[John Crispin <blogic@xxxxxxxxxxx>]

On 25/05/2015 22:39, Martin Blumenstingl wrote:
> 0x3 only masks two bits, but three bits have to be allowed. This fixes
> GPHY0 LED2 (which is the highest bit of phy2) on my board.
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>

Acked-by: John Crispin <blogic@xxxxxxxxxxx>

> ---
>  drivers/gpio/gpio-stp-xway.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpio/gpio-stp-xway.c b/drivers/gpio/gpio-stp-xway.c
> index 202361e..6d4148f 100644
> --- a/drivers/gpio/gpio-stp-xway.c
> +++ b/drivers/gpio/gpio-stp-xway.c
> @@ -58,7 +58,7 @@
>  #define XWAY_STP_ADSL_MASK	0x3
>  
>  /* 2 groups of 3 bits can be driven by the phys */
> -#define XWAY_STP_PHY_MASK	0x3
> +#define XWAY_STP_PHY_MASK	0x7
>  #define XWAY_STP_PHY1_SHIFT	27
>  #define XWAY_STP_PHY2_SHIFT	15
>  
> 
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