Re: [PATCH v2] pinctrl: zynq: configure SPI SSx pins separately

[Linus Walleij <linus.walleij@xxxxxxxxxx>]

On Sun, Apr 26, 2015 at 11:32 AM, Helmut Buchsbaum
<helmut.buchsbaum@xxxxxxxxx> wrote:

> Since SCLK, MISO and MOSI are the only mandatory signals at Zynq's SPI
> interfaces, SS0, SS1 and SS2 have to be configured separately as they may
> be used as simple GPIO lines.
>
> This, of course, has to be considered in the devicetree, so pin controller
> configuration for e.g. an SPI0 using SS0 and SS1 only might look like the
> following snippet (derived from the example of chapter "17.5.3
> MIO/EMIO" Routing of Zynq-7000 TRM UG585). So MIO20 can now be used
> as GPIO instead of being occupied by SPI0 SS2 function. Note the separate
> pinmux function for the slave select signals:

This v2 patch applied with Sören's ACK.

Yours,
Linus Walleij
--
To unsubscribe from this list: send the line "unsubscribe linux-gpio" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html