On 5/3/24 18:31, Joey Gouly wrote:
> This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE
> as the boot CPU will enable POE if it has it, so secondary CPUs must also
> have this feature.
>
> Signed-off-by: Joey Gouly <joey.gouly@xxxxxxx>
> Cc: Catalin Marinas <catalin.marinas@xxxxxxx>
> Cc: Will Deacon <will@xxxxxxxxxx>
> ---
> arch/arm64/kernel/cpufeature.c | 9 +++++++++
> arch/arm64/tools/cpucaps | 1 +
> 2 files changed, 10 insertions(+)
>
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 56583677c1f2..2f3c2346e156 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -2861,6 +2861,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
> .matches = has_nv1,
> ARM64_CPUID_FIELDS_NEG(ID_AA64MMFR4_EL1, E2H0, NI_NV1)
> },
> +#ifdef CONFIG_ARM64_POE
> + {
> + .desc = "Stage-1 Permission Overlay Extension (S1POE)",
> + .capability = ARM64_HAS_S1POE,
> + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE,
> + .matches = has_cpuid_feature,
> + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1POE, IMP)
> + },
> +#endif
> {},
> };
>
> diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
> index 62b2838a231a..45f558fc0d87 100644
> --- a/arch/arm64/tools/cpucaps
> +++ b/arch/arm64/tools/cpucaps
> @@ -45,6 +45,7 @@ HAS_MOPS
> HAS_NESTED_VIRT
> HAS_PAN
> HAS_S1PIE
> +HAS_S1POE
> HAS_RAS_EXTN
> HAS_RNG
> HAS_SB
Reviewed-by: Anshuman Khandual <anshuman.khandual@xxxxxxx>
