On 5/3/24 18:31, Joey Gouly wrote: > Allow EL0 or EL1 to access POR_EL0 without being trapped to EL2. > > Signed-off-by: Joey Gouly <joey.gouly@xxxxxxx> > Cc: Catalin Marinas <catalin.marinas@xxxxxxx> > Cc: Will Deacon <will@xxxxxxxxxx> > Acked-by: Catalin Marinas <catalin.marinas@xxxxxxx> > --- > arch/arm64/include/asm/el2_setup.h | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h > index b7afaa026842..df5614be4b70 100644 > --- a/arch/arm64/include/asm/el2_setup.h > +++ b/arch/arm64/include/asm/el2_setup.h > @@ -184,12 +184,20 @@ > .Lset_pie_fgt_\@: > mrs_s x1, SYS_ID_AA64MMFR3_EL1 > ubfx x1, x1, #ID_AA64MMFR3_EL1_S1PIE_SHIFT, #4 > - cbz x1, .Lset_fgt_\@ > + cbz x1, .Lset_poe_fgt_\@ > > /* Disable trapping of PIR_EL1 / PIRE0_EL1 */ > orr x0, x0, #HFGxTR_EL2_nPIR_EL1 > orr x0, x0, #HFGxTR_EL2_nPIRE0_EL1 > > +.Lset_poe_fgt_\@: > + mrs_s x1, SYS_ID_AA64MMFR3_EL1 > + ubfx x1, x1, #ID_AA64MMFR3_EL1_S1POE_SHIFT, #4 > + cbz x1, .Lset_fgt_\@ > + > + /* Disable trapping of POR_EL0 */ > + orr x0, x0, #HFGxTR_EL2_nPOR_EL0 > + > .Lset_fgt_\@: > msr_s SYS_HFGRTR_EL2, x0 > msr_s SYS_HFGWTR_EL2, x0 Reviewed-by: Anshuman Khandual <anshuman.khandual@xxxxxxx>
