> Subject: [PATCH v1 3/7] fpga: dfl: Allow for ports with no local bar space.
>
> From: Matthew Gerlach <matthew.gerlach@xxxxxxxxxxxxxxx>
>
> From a fpga partial reconfiguration standpoint, a port
> may not be connected any local BAR space. The port could
> be connected to a different PCIe Physical Function (PF) or
> Virtual Function (VF), in which case another driver instance
> would manage the endpoint.
>
> Signed-off-by: Matthew Gerlach <matthew.gerlach@xxxxxxxxxxxxxxx>
> Signed-off-by: Tianfei Zhang <tianfei.zhang@xxxxxxxxx>
> ---
> drivers/fpga/dfl-pci.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c
> index 4d68719e608f..8abd9b408403 100644
> --- a/drivers/fpga/dfl-pci.c
> +++ b/drivers/fpga/dfl-pci.c
> @@ -243,6 +243,7 @@ static int find_dfls_by_default(struct pci_dev *pcidev,
> v = readq(base + FME_HDR_CAP);
> port_num = FIELD_GET(FME_CAP_NUM_PORTS, v);
>
> + dev_info(&pcidev->dev, "port_num = %d\n", port_num);
Do we really need this info here? in FME there is one sysfs interface for port num.
> WARN_ON(port_num > MAX_DFL_FPGA_PORT_NUM);
>
> for (i = 0; i < port_num; i++) {
> @@ -258,6 +259,13 @@ static int find_dfls_by_default(struct pci_dev *pcidev,
> */
> bar = FIELD_GET(FME_PORT_OFST_BAR_ID, v);
> offset = FIELD_GET(FME_PORT_OFST_DFH_OFST, v);
> + if (bar >= PCI_STD_NUM_BARS) {
> + dev_info(&pcidev->dev, "skipping port without
> local BAR space %d\n",
> + bar);
> + continue;
Is this change for IOFS? From patch #1, we have FME and PORT on PF0, so
we should have a BAR for PORT on PF0, is my understanding correct?
Thanks
Hao
> + } else {
> + dev_info(&pcidev->dev, "BAR %d offset %u\n",
> bar, offset);
> + }
> start = pci_resource_start(pcidev, bar) + offset;
> len = pci_resource_len(pcidev, bar) - offset;
>
> --
> 2.17.1
