On Tue, Feb 18, 2020 at 05:56:52PM +0100, Ard Biesheuvel wrote: > On Tue, 18 Feb 2020 at 17:52, Russell King - ARM Linux admin > <linux@xxxxxxxxxxxxxxx> wrote: > > > > On Tue, Feb 18, 2020 at 05:44:29PM +0100, Ard Biesheuvel wrote: > > > In preparation of turning the decompressor's cache clean/flush > > > operations into proper by-VA maintenance for v7 cores, pass the > > > start and end addresses of the regions that need cache maintenance > > > into cache_clean_flush in registers r0 and r1. > > > > Where's the documentation of the new calling convention? This is > > assembly code, it needs such things documented as there's no > > function prototypes to give that information. > > > > Would something like > > diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S > index df93c9f0a19a..e4c779a89db1 100644 > --- a/arch/arm/boot/compressed/head.S > +++ b/arch/arm/boot/compressed/head.S > @@ -1207,6 +1207,9 @@ __armv7_mmu_cache_off: > /* > * Clean and flush the cache to maintain consistency. > * > + * On entry, > + * r0 = start address > + * r1 = end address (exclusive) > * On exit, > * r1, r2, r3, r9, r10, r11, r12 corrupted > * This routine must preserve: > > work for you? Definitely what is required, thanks. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up According to speedtest.net: 11.9Mbps down 500kbps up
