On Tue, Apr 18, 2017 at 04:17:11PM -0500, Tom Lendacky wrote:
> When System Memory Encryption (SME) is enabled, the physical address
> space is reduced. Adjust the x86_phys_bits value to reflect this
> reduction.
>
> Signed-off-by: Tom Lendacky <thomas.lendacky@xxxxxxx>
> ---
> arch/x86/kernel/cpu/amd.c | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
...
> @@ -622,8 +624,14 @@ static void early_init_amd(struct cpuinfo_x86 *c)
>
> /* Check if SME is enabled */
> rdmsrl(MSR_K8_SYSCFG, msr);
> - if (!(msr & MSR_K8_SYSCFG_MEM_ENCRYPT))
> + if (msr & MSR_K8_SYSCFG_MEM_ENCRYPT) {
> + unsigned int ebx;
> +
> + ebx = cpuid_ebx(0x8000001f);
> + c->x86_phys_bits -= (ebx >> 6) & 0x3f;
> + } else {
> clear_cpu_cap(c, X86_FEATURE_SME);
> + }
Lemme do some simplifying to save an indent level, get rid of local var
ebx and kill some { }-brackets for a bit better readability:
if (c->extended_cpuid_level >= 0x8000001f) {
u64 msr;
if (!cpu_has(c, X86_FEATURE_SME))
return;
/* Check if SME is enabled */
rdmsrl(MSR_K8_SYSCFG, msr);
if (msr & MSR_K8_SYSCFG_MEM_ENCRYPT)
c->x86_phys_bits -= (cpuid_ebx(0x8000001f) >> 6) & 0x3f;
else
clear_cpu_cap(c, X86_FEATURE_SME);
}
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
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