Hi
Trent Piepho schrieb:
> On Wed, 14 Mar 2007, Hartmut Hackmann wrote:
>> Trent Piepho schrieb:
>>>>> philips_fmd1216_tuner_init() just sends { 0x0b, 0xdc, 0x9c, 0xa0 } to the
>>>>> tuner. It could be replaced with the dvb-pll version, which will have
>>>>> the same effect.
>>>>>
>>>> I will have a look
>>> My fmd1216 patch will have the tuner init function send {0xdd, 0xa0} to the
>>> tuner. That will set the agc value (byte AB) to 0xa0, the same thing.
>>>
>> That's new for me. But if the data go to the upper bytes first, you are right.
>
> The way the PLL works is that if the first bit of data sent is a 1, then
> the next two bytes are CB+BB (or CB+AB). If the first bit is a 0, then the
> next two bytes are the divisor bytes. You can send the divisor first then
> the control bytes (as dvb-pll does), or the control bytes first and then
> the divisor bytes. Or just the control bytes, or just divisor bytes.
>
> If you look in the v4l tuner module, there is a special case hack to send
> the divisor first or second depending on if the new frequency is less than
> or greater than the old frequency.
>
I found the datasheet. Right, its documented there (but was new for me).
>>> Anyway, I don't think the frequency is valid either:
>>>
>>> divisor = 0x0bdc, ratio bits = 1,1 = 62.5 kHz, so freq = 189.75 MHz
>>> But, BB = 0x54, which is analog mode HIGH band. 189.75 MHz would be in the
>>> LOW band. (remember to subtract the IF frequency to compare to the
>>> bandswitch points used in the code)
>>>
>> Ratio bits are 1,0 so 167kHz. But i don't think ath this is so important..
>
> No, they are 1,1.
>
> CB is 0x86 = 1 0 000 11 0
> ^ identifies this as the control bytes
> ^ selects low charge pump current
> ^^^ sets the test mode to "normal" mode
> ^^ Ratio select 1,1 = 62.5 kHz
> ^ Turn the tuning voltage on
>
I was in the wrong area, sorry. I had 0x9c in mind.
>>> How does that happen? I figured P4 just changed the SAW filters, but it
>>> enables/disables the tda9887 too?
>>>
>> I have no idea why and how this is done, i just observed that...
>
> I wonder if this is a problem for the v4l tuner module. If one doesn't
> start and then stop the dvb frontend before using analog, how does the
> tda9887 get turned on?
>
It is a BIG problem. The tuner initialization code turns the tda9886 on,
but now things depend on the module initialization order whether the tda
is found or not. I haven't used my board in analog mode after the tda9887
merge but things look like it doesn't work any more :-(
Unfortunately i know about at least one board that needs the opposite
load order.
>>> The documentation for the Infineon TUA6034 should be easy to find if you
>>> don't have it. It's pretty clear that you don't need to send the divisor
>>> bytes each time. You can just send CB+BB or in this case CB+AB. And I've
>>> verified that indeed you can set the AGC values with just two bytes.
>>>
>> If this is the used PLL chip, i should have a look.
>> Did you check whether it is allowed to cut off the lo?
>
> I've been told that the fmd1216 uses the TUA6034. But in this case it
> doesn't really matter, all these I2C PLLs work this way. I have an 11 year
> old datasheet for a Philips tuner, and it's the same way.
>
>> Ack
>> I'd like to proceed this way:
>> - first i correct the bug in the sleep function.
>> - When your changes in dvb-pll are in mainstream, i will adapt the code in
>> saa7134-dvb. (you might decide to kick me)
>>
>> OK?
>
> My plan was to come up with a patch that converted all the users of fmd1216
> at once.
>
Ok, less work for me.
Hartmut
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