[PATCH 2/2] staging: most: dim2-hdm: introduce function dim2_transfer_madr

[Christian Gromm <christian.gromm@xxxxxxxxxxxxx>]

This patch removes duplicated code by putting it into the new function
dim2_transfer_madr.

Signed-off-by: Andrey Shvetsov <andrey.shvetsov@xxxxxx>
Signed-off-by: Christian Gromm <christian.gromm@xxxxxxxxxxxxx>
---
 drivers/staging/most/hdm-dim2/dim2_hal.c | 38 +++++++++++++-------------------
 1 file changed, 15 insertions(+), 23 deletions(-)

diff --git a/drivers/staging/most/hdm-dim2/dim2_hal.c b/drivers/staging/most/hdm-dim2/dim2_hal.c
index 335593b..6f2b6e4 100644
--- a/drivers/staging/most/hdm-dim2/dim2_hal.c
+++ b/drivers/staging/most/hdm-dim2/dim2_hal.c
@@ -135,6 +135,17 @@ static void free_dbr(int offs, int size)
 
 /* -------------------------------------------------------------------------- */
 
+static void dim2_transfer_madr(u32 val)
+{
+	dimcb_io_write(&g.dim2->MADR, val);
+
+	/* wait for transfer completion */
+	while ((dimcb_io_read(&g.dim2->MCTL) & 1) != 1)
+		continue;
+
+	dimcb_io_write(&g.dim2->MCTL, 0);   /* clear transfer complete */
+}
+
 static void dim2_clear_dbr(u16 addr, u16 size)
 {
 	enum { MADR_TB_BIT = 30, MADR_WNR_BIT = 31 };
@@ -145,26 +156,13 @@ static void dim2_clear_dbr(u16 addr, u16 size)
 	dimcb_io_write(&g.dim2->MCTL, 0);   /* clear transfer complete */
 	dimcb_io_write(&g.dim2->MDAT0, 0);
 
-	for (; addr < end_addr; addr++) {
-		dimcb_io_write(&g.dim2->MADR, cmd | addr);
-
-		/* wait till transfer is completed */
-		while ((dimcb_io_read(&g.dim2->MCTL) & 1) != 1)
-			continue;
-
-		dimcb_io_write(&g.dim2->MCTL, 0);  /* clear transfer complete */
-	}
+	for (; addr < end_addr; addr++)
+		dim2_transfer_madr(cmd | addr);
 }
 
 static u32 dim2_read_ctr(u32 ctr_addr, u16 mdat_idx)
 {
-	dimcb_io_write(&g.dim2->MADR, ctr_addr);
-
-	/* wait till transfer is completed */
-	while ((dimcb_io_read(&g.dim2->MCTL) & 1) != 1)
-		continue;
-
-	dimcb_io_write(&g.dim2->MCTL, 0);   /* clear transfer complete */
+	dim2_transfer_madr(ctr_addr);
 
 	return dimcb_io_read((&g.dim2->MDAT0) + mdat_idx);
 }
@@ -189,13 +187,7 @@ static void dim2_write_ctr_mask(u32 ctr_addr, const u32 *mask, const u32 *value)
 	dimcb_io_write(&g.dim2->MDWE2, mask[2]);
 	dimcb_io_write(&g.dim2->MDWE3, mask[3]);
 
-	dimcb_io_write(&g.dim2->MADR, bit_mask(MADR_WNR_BIT) | ctr_addr);
-
-	/* wait till transfer is completed */
-	while ((dimcb_io_read(&g.dim2->MCTL) & 1) != 1)
-		continue;
-
-	dimcb_io_write(&g.dim2->MCTL, 0);   /* clear transfer complete */
+	dim2_transfer_madr(bit_mask(MADR_WNR_BIT) | ctr_addr);
 }
 
 static inline void dim2_write_ctr(u32 ctr_addr, const u32 *value)
-- 
1.9.1

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