Replace (1 << x) by BIT(x) as recommended by
checkpatch.pl
Signed-off-by: Anish Bhatt <anish@xxxxxxxxxx>
---
drivers/staging/wilc1000/host_interface.c | 4 +-
drivers/staging/wilc1000/host_interface.h | 38 +++++++--------
drivers/staging/wilc1000/linux_wlan_common.h | 8 ++--
drivers/staging/wilc1000/wilc_sdio.c | 44 +++++++++---------
drivers/staging/wilc1000/wilc_spi.c | 24 +++++-----
drivers/staging/wilc1000/wilc_wfi_netdevice.h | 4 +-
drivers/staging/wilc1000/wilc_wlan.c | 67 ++++++++++++++-------------
drivers/staging/wilc1000/wilc_wlan.h | 20 ++++----
8 files changed, 105 insertions(+), 104 deletions(-)
diff --git a/drivers/staging/wilc1000/host_interface.c b/drivers/staging/wilc1000/host_interface.c
index 62f4a8a..ab3fe75 100644
--- a/drivers/staging/wilc1000/host_interface.c
+++ b/drivers/staging/wilc1000/host_interface.c
@@ -7366,7 +7366,7 @@ static void *host_int_ParseJoinBssParam(tstrNetworkInfo *ptstrNetworkInfo)
pNewJoinBssParam->wmm_cap = true;
/* Check if Bit 7 is set indicating U-APSD capability */
- if (pu8IEs[index + 8] & (1 << 7))
+ if (pu8IEs[index + 8] & BIT(7))
pNewJoinBssParam->uapsd_cap = true;
index += pu8IEs[index + 1] + 2;
continue;
@@ -7382,7 +7382,7 @@ static void *host_int_ParseJoinBssParam(tstrNetworkInfo *ptstrNetworkInfo)
pNewJoinBssParam->u8Index = pu8IEs[index + 9];
/* Check if Bit 7 is set indicating Opss capability */
- if (pu8IEs[index + 10] & (1 << 7)) {
+ if (pu8IEs[index + 10] & BIT(7)) {
pNewJoinBssParam->u8OppEnable = 1;
pNewJoinBssParam->u8CtWindow = pu8IEs[index + 10];
} else
diff --git a/drivers/staging/wilc1000/host_interface.h b/drivers/staging/wilc1000/host_interface.h
index c96fff9..0261b36 100644
--- a/drivers/staging/wilc1000/host_interface.h
+++ b/drivers/staging/wilc1000/host_interface.h
@@ -138,25 +138,25 @@ typedef struct {
} tstrCfgParamVal;
typedef enum {
- RETRY_SHORT = 1 << 0,
- RETRY_LONG = 1 << 1,
- FRAG_THRESHOLD = 1 << 2,
- RTS_THRESHOLD = 1 << 3,
- BSS_TYPE = 1 << 4,
- AUTH_TYPE = 1 << 5,
- AUTHEN_TIMEOUT = 1 << 6,
- POWER_MANAGEMENT = 1 << 7,
- PREAMBLE = 1 << 8,
- SHORT_SLOT_ALLOWED = 1 << 9,
- TXOP_PROT_DISABLE = 1 << 10,
- BEACON_INTERVAL = 1 << 11,
- DTIM_PERIOD = 1 << 12,
- SITE_SURVEY = 1 << 13,
- SITE_SURVEY_SCAN_TIME = 1 << 14,
- ACTIVE_SCANTIME = 1 << 15,
- PASSIVE_SCANTIME = 1 << 16,
- CURRENT_TX_RATE = 1 << 17,
- HT_ENABLE = 1 << 18,
+ RETRY_SHORT = BIT(0),
+ RETRY_LONG = BIT(1),
+ FRAG_THRESHOLD = BIT(2),
+ RTS_THRESHOLD = BIT(3),
+ BSS_TYPE = BIT(4),
+ AUTH_TYPE = BIT(5),
+ AUTHEN_TIMEOUT = BIT(6),
+ POWER_MANAGEMENT = BIT(7),
+ PREAMBLE = BIT(8),
+ SHORT_SLOT_ALLOWED = BIT(9),
+ TXOP_PROT_DISABLE = BIT(10),
+ BEACON_INTERVAL = BIT(11),
+ DTIM_PERIOD = BIT(12),
+ SITE_SURVEY = BIT(13),
+ SITE_SURVEY_SCAN_TIME = BIT(14),
+ ACTIVE_SCANTIME = BIT(15),
+ PASSIVE_SCANTIME = BIT(16),
+ CURRENT_TX_RATE = BIT(17),
+ HT_ENABLE = BIT(18),
} tenuCfgParam;
typedef struct {
diff --git a/drivers/staging/wilc1000/linux_wlan_common.h b/drivers/staging/wilc1000/linux_wlan_common.h
index 8ef80c6..2b76e41 100644
--- a/drivers/staging/wilc1000/linux_wlan_common.h
+++ b/drivers/staging/wilc1000/linux_wlan_common.h
@@ -44,10 +44,10 @@ void wilc_debugfs_remove(void);
extern atomic_t REGION;
extern atomic_t DEBUG_LEVEL;
-#define DEBUG (1 << 0)
-#define INFO (1 << 1)
-#define WRN (1 << 2)
-#define ERR (1 << 3)
+#define DEBUG BIT(0)
+#define INFO BIT(1)
+#define WRN BIT(2)
+#define ERR BIT(3)
#define PRINT_D(region, ...) \
do { \
diff --git a/drivers/staging/wilc1000/wilc_sdio.c b/drivers/staging/wilc1000/wilc_sdio.c
index 48834c6..15a9780 100644
--- a/drivers/staging/wilc1000/wilc_sdio.c
+++ b/drivers/staging/wilc1000/wilc_sdio.c
@@ -530,7 +530,7 @@ static int sdio_sync(void)
return 0;
}
- reg &= ~(1 << 8);
+ reg &= ~BIT(8);
if (!sdio_write_reg(WILC_MISC, reg)) {
g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write misc reg...\n");
return 0;
@@ -549,7 +549,7 @@ static int sdio_sync(void)
g_sdio.dPrint(N_ERR, "[wilc spi]: Failed read reg (%08x)...\n", WILC_PIN_MUX_0);
return 0;
}
- reg |= (1 << 8);
+ reg |= BIT(8);
ret = sdio_write_reg(WILC_PIN_MUX_0, reg);
if (!ret) {
g_sdio.dPrint(N_ERR, "[wilc spi]: Failed write reg (%08x)...\n", WILC_PIN_MUX_0);
@@ -564,7 +564,7 @@ static int sdio_sync(void)
g_sdio.dPrint(N_ERR, "[wilc spi]: Failed read reg (%08x)...\n", WILC_INTR_ENABLE);
return 0;
}
- reg |= (1 << 16);
+ reg |= BIT(16);
ret = sdio_write_reg(WILC_INTR_ENABLE, reg);
if (!ret) {
g_sdio.dPrint(N_ERR, "[wilc spi]: Failed write reg (%08x)...\n", WILC_INTR_ENABLE);
@@ -758,17 +758,17 @@ static int sdio_read_int(u32 *int_status)
cmd.data = 0;
g_sdio.sdio_cmd52(&cmd);
- if (cmd.data & (1 << 0))
+ if (cmd.data & BIT(0))
tmp |= INT_0;
- if (cmd.data & (1 << 2))
+ if (cmd.data & BIT(2))
tmp |= INT_1;
- if (cmd.data & (1 << 3))
+ if (cmd.data & BIT(3))
tmp |= INT_2;
- if (cmd.data & (1 << 4))
+ if (cmd.data & BIT(4))
tmp |= INT_3;
- if (cmd.data & (1 << 5))
+ if (cmd.data & BIT(5))
tmp |= INT_4;
- if (cmd.data & (1 << 6))
+ if (cmd.data & BIT(6))
tmp |= INT_5;
{
int i;
@@ -812,7 +812,7 @@ static int sdio_clear_int_ext(u32 val)
{
u32 flags;
- flags = val & ((1 << MAX_NUN_INT_THRPT_ENH2) - 1);
+ flags = val & (BIT(MAX_NUN_INT_THRPT_ENH2) - 1);
reg = flags;
}
#else
@@ -820,13 +820,13 @@ static int sdio_clear_int_ext(u32 val)
#endif
/* select VMM table 0 */
if ((val & SEL_VMM_TBL0) == SEL_VMM_TBL0)
- reg |= (1 << 5);
+ reg |= BIT(5);
/* select VMM table 1 */
if ((val & SEL_VMM_TBL1) == SEL_VMM_TBL1)
- reg |= (1 << 6);
+ reg |= BIT(6);
/* enable VMM */
if ((val & EN_VMM) == EN_VMM)
- reg |= (1 << 7);
+ reg |= BIT(7);
if (reg) {
sdio_cmd52_t cmd;
@@ -850,7 +850,7 @@ static int sdio_clear_int_ext(u32 val)
/* Cannot clear multiple interrupts. Must clear each interrupt individually */
u32 flags;
- flags = val & ((1 << MAX_NUM_INT) - 1);
+ flags = val & (BIT(MAX_NUM_INT) - 1);
if (flags) {
int i;
@@ -863,7 +863,7 @@ static int sdio_clear_int_ext(u32 val)
cmd.function = 0;
cmd.raw = 0;
cmd.address = 0xf8;
- cmd.data = (1 << i);
+ cmd.data = BIT(i);
ret = g_sdio.sdio_cmd52(&cmd);
if (!ret) {
@@ -893,13 +893,13 @@ static int sdio_clear_int_ext(u32 val)
vmm_ctl = 0;
/* select VMM table 0 */
if ((val & SEL_VMM_TBL0) == SEL_VMM_TBL0)
- vmm_ctl |= (1 << 0);
+ vmm_ctl |= BIT(0);
/* select VMM table 1 */
if ((val & SEL_VMM_TBL1) == SEL_VMM_TBL1)
- vmm_ctl |= (1 << 1);
+ vmm_ctl |= BIT(1);
/* enable VMM */
if ((val & EN_VMM) == EN_VMM)
- vmm_ctl |= (1 << 2);
+ vmm_ctl |= BIT(2);
if (vmm_ctl) {
sdio_cmd52_t cmd;
@@ -946,7 +946,7 @@ static int sdio_sync_ext(int nint /* how mant interrupts to enable. */)
return 0;
}
- reg &= ~(1 << 8);
+ reg &= ~BIT(8);
if (!sdio_write_reg(WILC_MISC, reg)) {
g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write misc reg...\n");
return 0;
@@ -965,7 +965,7 @@ static int sdio_sync_ext(int nint /* how mant interrupts to enable. */)
g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed read reg (%08x)...\n", WILC_PIN_MUX_0);
return 0;
}
- reg |= (1 << 8);
+ reg |= BIT(8);
ret = sdio_write_reg(WILC_PIN_MUX_0, reg);
if (!ret) {
g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write reg (%08x)...\n", WILC_PIN_MUX_0);
@@ -982,7 +982,7 @@ static int sdio_sync_ext(int nint /* how mant interrupts to enable. */)
}
for (i = 0; (i < 5) && (nint > 0); i++, nint--)
- reg |= (1 << (27 + i));
+ reg |= BIT((27 + i));
ret = sdio_write_reg(WILC_INTR_ENABLE, reg);
if (!ret) {
g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write reg (%08x)...\n", WILC_INTR_ENABLE);
@@ -996,7 +996,7 @@ static int sdio_sync_ext(int nint /* how mant interrupts to enable. */)
}
for (i = 0; (i < 3) && (nint > 0); i++, nint--)
- reg |= (1 << i);
+ reg |= BIT(i);
ret = sdio_read_reg(WILC_INTR2_ENABLE, ®);
if (!ret) {
diff --git a/drivers/staging/wilc1000/wilc_spi.c b/drivers/staging/wilc1000/wilc_spi.c
index 8426641..f762770 100644
--- a/drivers/staging/wilc1000/wilc_spi.c
+++ b/drivers/staging/wilc1000/wilc_spi.c
@@ -128,7 +128,7 @@ static int spi_cmd(u8 cmd, u32 adr, u32 data, u32 sz, u8 clockless)
case CMD_INTERNAL_READ: /* internal register read */
bc[1] = (u8)(adr >> 8);
if (clockless)
- bc[1] |= (1 << 7);
+ bc[1] |= BIT(7);
bc[2] = (u8)adr;
bc[3] = 0x00;
len = 5;
@@ -179,7 +179,7 @@ static int spi_cmd(u8 cmd, u32 adr, u32 data, u32 sz, u8 clockless)
case CMD_INTERNAL_WRITE: /* internal register write */
bc[1] = (u8)(adr >> 8);
if (clockless)
- bc[1] |= (1 << 7);
+ bc[1] |= BIT(7);
bc[2] = (u8)(adr);
bc[3] = (u8)(data >> 24);
bc[4] = (u8)(data >> 16);
@@ -288,7 +288,7 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless)
case CMD_INTERNAL_READ: /* internal register read */
wb[1] = (u8)(adr >> 8);
if (clockless == 1)
- wb[1] |= (1 << 7);
+ wb[1] |= BIT(7);
wb[2] = (u8)adr;
wb[3] = 0x00;
len = 5;
@@ -339,7 +339,7 @@ static int spi_cmd_complete(u8 cmd, u32 adr, u8 *b, u32 sz, u8 clockless)
case CMD_INTERNAL_WRITE: /* internal register write */
wb[1] = (u8)(adr >> 8);
if (clockless == 1)
- wb[1] |= (1 << 7);
+ wb[1] |= BIT(7);
wb[2] = (u8)(adr);
wb[3] = b[3];
wb[4] = b[2];
@@ -1048,7 +1048,7 @@ static int spi_sync(void)
PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_PIN_MUX_0);
return 0;
}
- reg |= (1 << 8);
+ reg |= BIT(8);
ret = spi_write_reg(WILC_PIN_MUX_0, reg);
if (!ret) {
PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_PIN_MUX_0);
@@ -1063,7 +1063,7 @@ static int spi_sync(void)
PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_INTR_ENABLE);
return 0;
}
- reg |= (1 << 16);
+ reg |= BIT(16);
ret = spi_write_reg(WILC_INTR_ENABLE, reg);
if (!ret) {
PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_INTR_ENABLE);
@@ -1254,7 +1254,7 @@ static int spi_clear_int_ext(u32 val)
} else {
u32 flags;
- flags = val & ((1 << MAX_NUM_INT) - 1);
+ flags = val & (BIT(MAX_NUM_INT) - 1);
if (flags) {
int i;
@@ -1284,10 +1284,10 @@ static int spi_clear_int_ext(u32 val)
tbl_ctl = 0;
/* select VMM table 0 */
if ((val & SEL_VMM_TBL0) == SEL_VMM_TBL0)
- tbl_ctl |= (1 << 0);
+ tbl_ctl |= BIT(0);
/* select VMM table 1 */
if ((val & SEL_VMM_TBL1) == SEL_VMM_TBL1)
- tbl_ctl |= (1 << 1);
+ tbl_ctl |= BIT(1);
ret = spi_write_reg(WILC_VMM_TBL_CTL, tbl_ctl);
if (!ret) {
@@ -1331,7 +1331,7 @@ static int spi_sync_ext(int nint /* how mant interrupts to enable. */)
PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_PIN_MUX_0);
return 0;
}
- reg |= (1 << 8);
+ reg |= BIT(8);
ret = spi_write_reg(WILC_PIN_MUX_0, reg);
if (!ret) {
PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_PIN_MUX_0);
@@ -1348,7 +1348,7 @@ static int spi_sync_ext(int nint /* how mant interrupts to enable. */)
}
for (i = 0; (i < 5) && (nint > 0); i++, nint--) {
- reg |= (1 << (27 + i));
+ reg |= (BIT((27 + i)));
}
ret = spi_write_reg(WILC_INTR_ENABLE, reg);
if (!ret) {
@@ -1363,7 +1363,7 @@ static int spi_sync_ext(int nint /* how mant interrupts to enable. */)
}
for (i = 0; (i < 3) && (nint > 0); i++, nint--) {
- reg |= (1 << i);
+ reg |= BIT(i);
}
ret = spi_read_reg(WILC_INTR2_ENABLE, ®);
diff --git a/drivers/staging/wilc1000/wilc_wfi_netdevice.h b/drivers/staging/wilc1000/wilc_wfi_netdevice.h
index 90fe1e2..5fe6ae6 100644
--- a/drivers/staging/wilc1000/wilc_wfi_netdevice.h
+++ b/drivers/staging/wilc1000/wilc_wfi_netdevice.h
@@ -52,8 +52,8 @@
/*iftype*/
enum stats_flags {
- WILC_WFI_RX_PKT = 1 << 0,
- WILC_WFI_TX_PKT = 1 << 1,
+ WILC_WFI_RX_PKT = BIT(0),
+ WILC_WFI_TX_PKT = BIT(1),
};
struct WILC_WFI_stats {
diff --git a/drivers/staging/wilc1000/wilc_wlan.c b/drivers/staging/wilc1000/wilc_wlan.c
index c218ee8..41e148d 100644
--- a/drivers/staging/wilc1000/wilc_wlan.c
+++ b/drivers/staging/wilc1000/wilc_wlan.c
@@ -662,7 +662,7 @@ static inline void chip_allow_sleep(void)
/* Clear bit 1 */
g_wlan.hif_func.hif_read_reg(0xf0, ®);
- g_wlan.hif_func.hif_write_reg(0xf0, reg & ~(1 << 0));
+ g_wlan.hif_func.hif_write_reg(0xf0, reg & ~BIT(0));
}
static inline void chip_wakeup(void)
@@ -674,10 +674,10 @@ static inline void chip_wakeup(void)
do {
g_wlan.hif_func.hif_read_reg(1, ®);
/* Set bit 1 */
- g_wlan.hif_func.hif_write_reg(1, reg | (1 << 1));
+ g_wlan.hif_func.hif_write_reg(1, reg | BIT(1));
/* Clear bit 1*/
- g_wlan.hif_func.hif_write_reg(1, reg & ~(1 << 1));
+ g_wlan.hif_func.hif_write_reg(1, reg & ~BIT(1));
do {
/* Wait for the chip to stabilize*/
@@ -694,7 +694,7 @@ static inline void chip_wakeup(void)
g_wlan.hif_func.hif_read_reg(0xf0, ®);
do {
/* Set bit 1 */
- g_wlan.hif_func.hif_write_reg(0xf0, reg | (1 << 0));
+ g_wlan.hif_func.hif_write_reg(0xf0, reg | BIT(0));
/* Check the clock status */
g_wlan.hif_func.hif_read_reg(0xf1, &clk_status_reg);
@@ -717,7 +717,8 @@ static inline void chip_wakeup(void)
/* in case of failure, Reset the wakeup bit to introduce a new edge on the next loop */
if ((clk_status_reg & 0x1) == 0) {
/* Reset bit 0 */
- g_wlan.hif_func.hif_write_reg(0xf0, reg & (~(1 << 0)));
+ g_wlan.hif_func.hif_write_reg(0xf0, reg &
+ (~BIT(0)));
}
} while ((clk_status_reg & 0x1) == 0);
}
@@ -725,7 +726,7 @@ static inline void chip_wakeup(void)
if (genuChipPSstate == CHIP_SLEEPING_MANUAL) {
g_wlan.hif_func.hif_read_reg(0x1C0C, ®);
- reg &= ~(1 << 0);
+ reg &= ~BIT(0);
g_wlan.hif_func.hif_write_reg(0x1C0C, reg);
if (wilc_get_chipid(false) >= 0x1002b0) {
@@ -733,11 +734,11 @@ static inline void chip_wakeup(void)
u32 val32;
g_wlan.hif_func.hif_read_reg(0x1e1c, &val32);
- val32 |= (1 << 6);
+ val32 |= BIT(6);
g_wlan.hif_func.hif_write_reg(0x1e1c, val32);
g_wlan.hif_func.hif_read_reg(0x1e9c, &val32);
- val32 |= (1 << 6);
+ val32 |= BIT(6);
g_wlan.hif_func.hif_write_reg(0x1e9c, val32);
}
}
@@ -752,19 +753,19 @@ static inline void chip_wakeup(void)
if ((g_wlan.io_func.io_type & 0x1) == HIF_SPI) {
g_wlan.hif_func.hif_read_reg(1, ®);
/* Make sure bit 1 is 0 before we start. */
- g_wlan.hif_func.hif_write_reg(1, reg & ~(1 << 1));
+ g_wlan.hif_func.hif_write_reg(1, reg & ~BIT(1));
/* Set bit 1 */
- g_wlan.hif_func.hif_write_reg(1, reg | (1 << 1));
+ g_wlan.hif_func.hif_write_reg(1, reg | BIT(1));
/* Clear bit 1*/
- g_wlan.hif_func.hif_write_reg(1, reg & ~(1 << 1));
+ g_wlan.hif_func.hif_write_reg(1, reg & ~BIT(1));
} else if ((g_wlan.io_func.io_type & 0x1) == HIF_SDIO) {
/* Make sure bit 0 is 0 before we start. */
g_wlan.hif_func.hif_read_reg(0xf0, ®);
- g_wlan.hif_func.hif_write_reg(0xf0, reg & ~(1 << 0));
+ g_wlan.hif_func.hif_write_reg(0xf0, reg & ~BIT(0));
/* Set bit 1 */
- g_wlan.hif_func.hif_write_reg(0xf0, reg | (1 << 0));
+ g_wlan.hif_func.hif_write_reg(0xf0, reg | BIT(0));
/* Clear bit 1 */
- g_wlan.hif_func.hif_write_reg(0xf0, reg & ~(1 << 0));
+ g_wlan.hif_func.hif_write_reg(0xf0, reg & ~BIT(0));
}
do {
@@ -782,7 +783,7 @@ static inline void chip_wakeup(void)
if (genuChipPSstate == CHIP_SLEEPING_MANUAL) {
g_wlan.hif_func.hif_read_reg(0x1C0C, ®);
- reg &= ~(1 << 0);
+ reg &= ~BIT(0);
g_wlan.hif_func.hif_write_reg(0x1C0C, reg);
if (wilc_get_chipid(false) >= 0x1002b0) {
@@ -790,11 +791,11 @@ static inline void chip_wakeup(void)
u32 val32;
g_wlan.hif_func.hif_read_reg(0x1e1c, &val32);
- val32 |= (1 << 6);
+ val32 |= BIT(6);
g_wlan.hif_func.hif_write_reg(0x1e1c, val32);
g_wlan.hif_func.hif_read_reg(0x1e9c, &val32);
- val32 |= (1 << 6);
+ val32 |= BIT(6);
g_wlan.hif_func.hif_write_reg(0x1e9c, val32);
}
}
@@ -885,7 +886,7 @@ static int wilc_wlan_handle_txq(u32 *pu32TxqCount)
PRINT_D(TX_DBG, "VMMTable entry size = %d\n", vmm_table[i]);
if (tqe->type == WILC_CFG_PKT) {
- vmm_table[i] |= (1 << 10);
+ vmm_table[i] |= BIT(10);
PRINT_D(TX_DBG, "VMMTable entry changed for CFG packet = %d\n", vmm_table[i]);
}
#ifdef BIG_ENDIAN
@@ -1010,7 +1011,7 @@ static int wilc_wlan_handle_txq(u32 *pu32TxqCount)
wilc_debug(N_ERR, "[wilc txq]: fail can't read reg WILC_HOST_TX_CTRL..\n");
break;
}
- reg &= ~(1ul << 0);
+ reg &= ~BIT(0);
ret = p->hif_func.hif_write_reg(WILC_HOST_TX_CTRL, reg);
if (!ret) {
wilc_debug(N_ERR, "[wilc txq]: fail can't write reg WILC_HOST_TX_CTRL..\n");
@@ -1051,9 +1052,9 @@ static int wilc_wlan_handle_txq(u32 *pu32TxqCount)
vmm_sz *= 4;
header = (tqe->type << 31) | (tqe->buffer_size << 15) | vmm_sz;
if (tqe->type == WILC_MGMT_PKT)
- header |= (1 << 30);
+ header |= BIT(30);
else
- header &= ~(1 << 30);
+ header &= ~BIT(30);
#ifdef BIG_ENDIAN
header = BYTE_SWAP(header);
@@ -1422,7 +1423,7 @@ static int wilc_wlan_firmware_download(const u8 *buffer, u32 buffer_size)
u8 *dma_buffer;
int ret = 0;
- blksz = (1ul << 12);
+ blksz = BIT(12);
/* Allocate a DMA coherent buffer. */
dma_buffer = kmalloc(blksz, GFP_KERNEL);
@@ -1515,7 +1516,7 @@ static int wilc_wlan_start(void)
#else
if (p->io_func.io_type == HIF_SDIO) {
reg = 0;
- reg |= (1 << 3); /* bug 4456 and 4557 */
+ reg |= BIT(3); /* bug 4456 and 4557 */
} else if (p->io_func.io_type == HIF_SPI) {
reg = 1;
}
@@ -1592,13 +1593,13 @@ static int wilc_wlan_start(void)
p->hif_func.hif_read_reg(WILC_GLB_RESET_0, ®);
- if ((reg & (1ul << 10)) == (1ul << 10)) {
- reg &= ~(1ul << 10);
+ if ((reg & BIT(10)) == BIT(10)) {
+ reg &= ~BIT(10);
p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
p->hif_func.hif_read_reg(WILC_GLB_RESET_0, ®);
}
- reg |= (1ul << 10);
+ reg |= BIT(10);
ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
p->hif_func.hif_read_reg(WILC_GLB_RESET_0, ®);
release_bus(RELEASE_ONLY);
@@ -1633,7 +1634,7 @@ static int wilc_wlan_stop(void)
return ret;
}
- reg &= ~(1 << 10);
+ reg &= ~BIT(10);
ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
@@ -1654,9 +1655,9 @@ static int wilc_wlan_stop(void)
}
PRINT_D(GENERIC_DBG, "Read RESET Reg %x : Retry%d\n", reg, timeout);
/*Workaround to ensure that the chip is actually reset*/
- if ((reg & (1 << 10))) {
+ if ((reg & BIT(10))) {
PRINT_D(GENERIC_DBG, "Bit 10 not reset : Retry %d\n", timeout);
- reg &= ~(1 << 10);
+ reg &= ~BIT(10);
ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
timeout--;
} else {
@@ -1672,11 +1673,11 @@ static int wilc_wlan_stop(void)
}
} while (timeout);
- reg = ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 8) |
- (1 << 9) | (1 << 26) | (1 << 29) | (1 << 30) | (1 << 31));
+ reg = (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(8) | BIT(9) | BIT(26) |
+ BIT(29) | BIT(30) | BIT(31));
p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
- reg = ~(1 << 10);
+ reg = (u32)~BIT(10);
ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
@@ -1902,7 +1903,7 @@ u32 init_chip(void)
wilc_debug(N_ERR, "[wilc start]: fail read reg 0x1118 ...\n");
return ret;
}
- reg |= (1 << 0);
+ reg |= BIT(0);
ret = g_wlan.hif_func.hif_write_reg(0x1118, reg);
if (!ret) {
wilc_debug(N_ERR, "[wilc start]: fail write reg 0x1118 ...\n");
diff --git a/drivers/staging/wilc1000/wilc_wlan.h b/drivers/staging/wilc1000/wilc_wlan.h
index 60da18c..1ed4e2c 100644
--- a/drivers/staging/wilc1000/wilc_wlan.h
+++ b/drivers/staging/wilc1000/wilc_wlan.h
@@ -152,7 +152,7 @@
#endif
-#define ABORT_INT (1 << 31)
+#define ABORT_INT BIT(31)
/*******************************************/
/* E0 and later Interrupt flags. */
@@ -191,15 +191,15 @@
/* 7: Select VMM table 2 */
/* 8: Enable VMM */
/*******************************************/
-#define CLR_INT0 (1 << 0)
-#define CLR_INT1 (1 << 1)
-#define CLR_INT2 (1 << 2)
-#define CLR_INT3 (1 << 3)
-#define CLR_INT4 (1 << 4)
-#define CLR_INT5 (1 << 5)
-#define SEL_VMM_TBL0 (1 << 6)
-#define SEL_VMM_TBL1 (1 << 7)
-#define EN_VMM (1 << 8)
+#define CLR_INT0 BIT(0)
+#define CLR_INT1 BIT(1)
+#define CLR_INT2 BIT(2)
+#define CLR_INT3 BIT(3)
+#define CLR_INT4 BIT(4)
+#define CLR_INT5 BIT(5)
+#define SEL_VMM_TBL0 BIT(6)
+#define SEL_VMM_TBL1 BIT(7)
+#define EN_VMM BIT(8)
#define DATA_INT_EXT INT_0
#define PLL_INT_EXT INT_1
--
2.5.1
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