RE: [PATCH v2 5/5] Staging: comedi: addi-data: tidy up counter register map defines in hwdrv_apci1564.c

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On Friday, March 07, 2014 1:38 AM, Chase Southwood wrote:
> This patch fixes the register map defines for the counter registers such
> that they are all the real offsets to each register, rather than a mix of
> real offsets and adders to those offsets.
>
> Signed-off-by: Chase Southwood <chase.southwood@xxxxxxxxx>
> ---
>
> 2: Simplified commit message, fixed indentation and whitespace damage.
> I have test applied this patch, it should work now.
> v2 also fixes several build breakages, and I have compile tested as well.
> Everything should be fixed.

Chase,

Looks better, the patches apply now.

The register map whitespace is still a bit of a mess. This is what it looks like
after applying all 5 patches:

/*
 * devpriv->i_IobaseAmcc Register Map
 */
#define APCI1564_DI_REG						0x04
#define APCI1564_DI_INT_MODE1_REG				0x08
#define APCI1564_DI_INT_MODE2_REG				0x0c
#define APCI1564_DI_INT_STATUS_REG				0x10
#define APCI1564_DI_IRQ_REG					0x14
#define APCI1564_DO_REG						0x18
#define APCI1564_DO_INT_CTRL_REG				0x1c
#define APCI1564_DO_INT_STATUS_REG				0x20
#define APCI1564_DO_IRQ_REG					0x24
#define APCI1564_WDOG_REG						0x28
#define APCI1564_WDOG_RELOAD_REG				0x2c
#define APCI1564_WDOG_TIMEBASE_REG				0x30
#define APCI1564_WDOG_CTRL_REG					0x34
#define APCI1564_WDOG_STATUS_REG				0x38
#define APCI1564_WDOG_IRQ_REG					0x3c
#define APCI1564_WDOG_WARN_TIMEVAL_REG			0x40
#define APCI1564_WDOG_WARN_TIMEBASE_REG		0x44
#define APCI1564_TIMER_REG						0x48
#define APCI1564_TIMER_RELOAD_REG				0x4c
#define APCI1564_TIMER_TIMEBASE_REG			0x50
#define APCI1564_TIMER_CTRL_REG				0x54
#define APCI1564_TIMER_STATUS_REG				0x58
#define APCI1564_TIMER_IRQ_REG					0x5c
#define APCI1564_TIMER_WARN_TIMEVAL_REG		0x60
#define APCI1564_TIMER_WARN_TIMEBASE_REG		0x64

/*
 * devpriv->iobase Register Map
 */
#define APCI1564_TCW_REG(x)					(0x00 + ((x) * 0x20))
#define APCI1564_TCW_RELOAD_REG(x)				(0x04 + ((x) * 0x20))
#define APCI1564_TCW_TIMEBASE_REG(x)			(0x08 + ((x) * 0x20))
#define APCI1564_TCW_CTRL_REG(x)				(0x0c + ((x) * 0x20))
#define APCI1564_TCW_STATUS_REG(x)				(0x10 + ((x) * 0x20))
#define APCI1564_TCW_IRQ_REG(x)				(0x14 + ((x) * 0x20))
#define APCI1564_TCW_WARN_TIMEVAL_REG(x)		(0x18 + ((x) * 0x20))
#define APCI1564_TCW_WARN_TIMEBASE_REG(x)		(0x1c + ((x) * 0x20))

Check your tab settings in your editor. Normal tab spacing is 8 characters.
It looks like all the defines align properly at column 49 which is one tab after
the define on this line:

#define APCI1564_TCW_WARN_TIMEBASE_REG(x)	(0x1c + ((x) * 0x20))

Other than that the patches look good.

Regards,
Hartley
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