Hi Martyn, On Fri, Dec 27, 2013 at 4:34 PM, Michael Kenney <mfkenney@xxxxxxxxx> wrote: > > Hi Martyn, > > On Fri, Dec 27, 2013 at 4:23 PM, Martyn Welch <martyn@xxxxxxxxxxxx> wrote: > > On 27/12/13 20:15, Michael Kenney wrote: > >> > >> We are using the vme_tsi148 bridge driver along with the vme_user > >> driver to access the VME boards. The A/D board requires D32 bus cycles > >> and the VME master window is configured accordingly, however, when > >> monitoring the bus cycles with a logic analyzer, we noticed that the > >> CPU is transferring one byte at a time (i.e. four D8 transfers rather > >> than one D32). > >> > >> Is this the expected behavior of the tsi148 driver? > >> > > > > Hi Mike, > > > > This is certainly not the expected behaviour - if the window is configured > > for D32 then it should do 32 bit transfers where possible. > > > > I've heard of this happening recently, but haven't yet been able to > > replicate it. Which VME board are you running Linux on and which flavour of > > Linux? > > I'm running Debian 7.2 with kernel 3.2 on a Fastwel CPC600 (Pentium M > based CPU board). > Just wanted to touch-base and see if you had any insight as to this VME protocol issue with the tsi148. Let me know if there are any further tests you would like me to run. Thanks. --Mike _______________________________________________ devel mailing list devel@xxxxxxxxxxxxxxxxxxxxxx http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
