The "Input Select" registers are sequential in the enum ni_gpct_register.
Replace this inline CamelCase function with a simple define.
Signed-off-by: H Hartley Sweeten <hsweeten@xxxxxxxxxxxxxxxxxxx>
Cc: Ian Abbott <abbotti@xxxxxxxxx>
Cc: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/staging/comedi/drivers/ni_tio.c | 18 +++++++++---------
drivers/staging/comedi/drivers/ni_tio_internal.h | 16 +---------------
drivers/staging/comedi/drivers/ni_tiocmd.c | 2 +-
3 files changed, 11 insertions(+), 25 deletions(-)
diff --git a/drivers/staging/comedi/drivers/ni_tio.c b/drivers/staging/comedi/drivers/ni_tio.c
index 2d20e8d..21456d6 100644
--- a/drivers/staging/comedi/drivers/ni_tio.c
+++ b/drivers/staging/comedi/drivers/ni_tio.c
@@ -393,7 +393,7 @@ void ni_tio_init_counter(struct ni_gpct *counter)
regs[NITIO_LOADB_REG(counter->counter_index)],
NITIO_LOADB_REG(counter->counter_index));
ni_tio_set_bits(counter,
- NITIO_Gi_Input_Select_Reg(counter->counter_index), ~0,
+ NITIO_INPUT_SEL_REG(counter->counter_index), ~0,
0);
if (ni_tio_counting_mode_registers_present(counter_dev)) {
ni_tio_set_bits(counter,
@@ -533,7 +533,7 @@ static int ni_tio_set_counter_mode(struct ni_gpct *counter, unsigned mode)
if (mode & NI_GPCT_INVERT_OUTPUT_BIT)
input_select_bits |= Gi_Output_Polarity_Bit;
ni_tio_set_bits(counter,
- NITIO_Gi_Input_Select_Reg(counter->counter_index),
+ NITIO_INPUT_SEL_REG(counter->counter_index),
Gi_Gate_Select_Load_Source_Bit | Gi_Or_Gate_Bit |
Gi_Output_Polarity_Bit, input_select_bits);
@@ -767,7 +767,7 @@ static int ni_tio_set_clock_src(struct ni_gpct *counter,
if (clock_source & NI_GPCT_INVERT_CLOCK_SRC_BIT)
input_select_bits |= Gi_Source_Polarity_Bit;
ni_tio_set_bits(counter,
- NITIO_Gi_Input_Select_Reg(counter->counter_index),
+ NITIO_INPUT_SEL_REG(counter->counter_index),
Gi_Source_Select_Mask | Gi_Source_Polarity_Bit,
input_select_bits);
ni_tio_set_source_subselect(counter, clock_source);
@@ -813,7 +813,7 @@ static unsigned ni_tio_clock_src_modifiers(const struct ni_gpct *counter)
unsigned bits = 0;
if (ni_tio_get_soft_copy(counter,
- NITIO_Gi_Input_Select_Reg
+ NITIO_INPUT_SEL_REG
(counter->counter_index)) &
Gi_Source_Polarity_Bit)
bits |= NI_GPCT_INVERT_CLOCK_SRC_BIT;
@@ -832,7 +832,7 @@ static unsigned ni_m_series_clock_src_select(const struct ni_gpct *counter)
unsigned clock_source = 0;
unsigned i;
const unsigned input_select = (ni_tio_get_soft_copy(counter,
- NITIO_Gi_Input_Select_Reg
+ NITIO_INPUT_SEL_REG
(counter->counter_index))
& Gi_Source_Select_Mask) >>
Gi_Source_Select_Shift;
@@ -897,7 +897,7 @@ static unsigned ni_660x_clock_src_select(const struct ni_gpct *counter)
unsigned clock_source = 0;
unsigned i;
const unsigned input_select = (ni_tio_get_soft_copy(counter,
- NITIO_Gi_Input_Select_Reg
+ NITIO_INPUT_SEL_REG
(counter->counter_index))
& Gi_Source_Select_Mask) >>
Gi_Source_Select_Shift;
@@ -1076,7 +1076,7 @@ static int ni_660x_set_first_gate(struct ni_gpct *counter,
break;
}
ni_tio_set_bits(counter,
- NITIO_Gi_Input_Select_Reg(counter->counter_index),
+ NITIO_INPUT_SEL_REG(counter->counter_index),
Gi_Gate_Select_Mask,
Gi_Gate_Select_Bits(ni_660x_gate_select));
return 0;
@@ -1125,7 +1125,7 @@ static int ni_m_series_set_first_gate(struct ni_gpct *counter,
break;
}
ni_tio_set_bits(counter,
- NITIO_Gi_Input_Select_Reg(counter->counter_index),
+ NITIO_INPUT_SEL_REG(counter->counter_index),
Gi_Gate_Select_Mask,
Gi_Gate_Select_Bits(ni_m_series_gate_select));
return 0;
@@ -1507,7 +1507,7 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned gate_index,
} else {
gate_select_bits =
(ni_tio_get_soft_copy(counter,
- NITIO_Gi_Input_Select_Reg
+ NITIO_INPUT_SEL_REG
(counter->counter_index)) &
Gi_Gate_Select_Mask) >> Gi_Gate_Select_Shift;
}
diff --git a/drivers/staging/comedi/drivers/ni_tio_internal.h b/drivers/staging/comedi/drivers/ni_tio_internal.h
index d4176bf..b8cd43b 100644
--- a/drivers/staging/comedi/drivers/ni_tio_internal.h
+++ b/drivers/staging/comedi/drivers/ni_tio_internal.h
@@ -27,6 +27,7 @@
#define NITIO_MODE_REG(x) (NITIO_G0_MODE + (x))
#define NITIO_LOADA_REG(x) (NITIO_G0_LOADA + (x))
#define NITIO_LOADB_REG(x) (NITIO_G0_LOADB + (x))
+#define NITIO_INPUT_SEL_REG(x) (NITIO_G0_INPUT_SEL + (x))
static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx)
{
@@ -43,21 +44,6 @@ static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx)
return 0;
}
-static inline enum ni_gpct_register NITIO_Gi_Input_Select_Reg(unsigned idx)
-{
- switch (idx) {
- case 0:
- return NITIO_G0_INPUT_SEL;
- case 1:
- return NITIO_G1_INPUT_SEL;
- case 2:
- return NITIO_G2_INPUT_SEL;
- case 3:
- return NITIO_G3_INPUT_SEL;
- }
- return 0;
-}
-
static inline enum ni_gpct_register NITIO_Gxx_Joint_Reset_Reg(unsigned idx)
{
switch (idx) {
diff --git a/drivers/staging/comedi/drivers/ni_tiocmd.c b/drivers/staging/comedi/drivers/ni_tiocmd.c
index b78103d..b3dad4f 100644
--- a/drivers/staging/comedi/drivers/ni_tiocmd.c
+++ b/drivers/staging/comedi/drivers/ni_tiocmd.c
@@ -66,7 +66,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
input_select_bits |= Gi_Write_Acknowledges_Irq;
}
ni_tio_set_bits(counter,
- NITIO_Gi_Input_Select_Reg(counter->counter_index),
+ NITIO_INPUT_SEL_REG(counter->counter_index),
Gi_Read_Acknowledges_Irq | Gi_Write_Acknowledges_Irq,
input_select_bits);
switch (counter_dev->variant) {
--
1.8.5.2
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