I believe some endian conversions are needed for the card to work with big endian hosts.
Not tested, feedback kindly requested.
Signed-off-by: Vasilis Liaskovitis <vliaskov@xxxxxxxxx>
Index: linux-next/drivers/staging/b3dfg/b3dfg.c
===================================================================
--- linux-next.orig/drivers/staging/b3dfg/b3dfg.c 2009-09-22 00:50:40.000000000 -0500
+++ linux-next/drivers/staging/b3dfg/b3dfg.c 2009-09-22 00:53:54.000000000 -0500
@@ -214,7 +214,7 @@
cpu_to_le32(frm_addr_dma));
b3dfg_write32(fgdev, B3D_REG_EC220_TRF_SIZE,
cpu_to_le32(frm_size >> 2));
- b3dfg_write32(fgdev, B3D_REG_EC220_DMA_STS, 0xf);
+ b3dfg_write32(fgdev, B3D_REG_EC220_DMA_STS, cpu_to_le32(0xf));
return 0;
}
@@ -460,7 +460,7 @@
static int get_wand_status(struct b3dfg_dev *fgdev, int __user *arg)
{
- u32 wndstat = b3dfg_read32(fgdev, B3D_REG_WAND_STS);
+ u32 wndstat = le32_to_cpu(b3dfg_read32(fgdev, B3D_REG_WAND_STS));
dev_dbg(&fgdev->pdev->dev, "wand status %x\n", wndstat);
return __put_user(wndstat & 0x1, arg);
}
@@ -474,7 +474,7 @@
dev_dbg(dev, "enable transmission\n");
/* check the cable is plugged in. */
- if (!b3dfg_read32(fgdev, B3D_REG_WAND_STS)) {
+ if (!le32_to_cpu(b3dfg_read32(fgdev, B3D_REG_WAND_STS))) {
dev_dbg(dev, "cannot start transmission without wand\n");
return -EINVAL;
}
@@ -509,7 +509,7 @@
spin_unlock_irqrestore(&fgdev->buffer_lock, flags);
/* Enable DMA and cable status interrupts. */
- b3dfg_write32(fgdev, B3D_REG_HW_CTRL, 0x03);
+ b3dfg_write32(fgdev, B3D_REG_HW_CTRL, cpu_to_le32(0x03));
out:
return 0;
@@ -532,7 +532,7 @@
/* FIXME: temporary debugging only. if the board stops transmitting,
* hitting ctrl+c and seeing this message is useful for determining
* the state of the board. */
- tmp = b3dfg_read32(fgdev, B3D_REG_DMA_STS);
+ tmp = le32_to_cpu(b3dfg_read32(fgdev, B3D_REG_DMA_STS));
dev_dbg(dev, "DMA_STS reads %x after TX stopped\n", tmp);
dequeue_all_buffers(fgdev);
@@ -577,7 +577,7 @@
/* Called in interrupt context. */
static void handle_cstate_change(struct b3dfg_dev *fgdev)
{
- u32 cstate = b3dfg_read32(fgdev, B3D_REG_WAND_STS);
+ u32 cstate = le32_to_cpu(b3dfg_read32(fgdev, B3D_REG_WAND_STS));
unsigned long when;
struct device *dev = &fgdev->pdev->dev;
@@ -683,7 +683,7 @@
bool need_ack = 1;
irqreturn_t res = IRQ_HANDLED;
- sts = b3dfg_read32(fgdev, B3D_REG_DMA_STS);
+ sts = le32_to_cpu(b3dfg_read32(fgdev, B3D_REG_DMA_STS));
if (unlikely(sts == 0)) {
dev_warn(dev, "ignore interrupt, DMA status is 0\n");
res = IRQ_NONE;
@@ -723,7 +723,8 @@
/* Has a frame transfer been completed? */
if (sts & 0x4) {
- u32 dma_status = b3dfg_read32(fgdev, B3D_REG_EC220_DMA_STS);
+ u32 dma_status = le32_to_cpu(b3dfg_read32(fgdev,
+ B3D_REG_EC220_DMA_STS));
/* Check for DMA errors reported by the hardware. */
if (unlikely(dma_status & 0x1)) {
@@ -755,7 +756,7 @@
out:
if (need_ack) {
dev_dbg(dev, "acknowledging interrupt\n");
- b3dfg_write32(fgdev, B3D_REG_EC220_DMA_STS, 0x0b);
+ b3dfg_write32(fgdev, B3D_REG_EC220_DMA_STS, cpu_to_le32(0x0b));
}
return res;
}
@@ -870,7 +871,7 @@
static int b3dfg_init_dev(struct b3dfg_dev *fgdev)
{
int i, j;
- u32 frm_size = b3dfg_read32(fgdev, B3D_REG_FRM_SIZE);
+ u32 frm_size = le32_to_cpu(b3dfg_read32(fgdev, B3D_REG_FRM_SIZE));
/* Disable interrupts. In abnormal circumstances (e.g. after a crash)
* the board may still be transmitting from the previous session. If we
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