This is used on Apple ARM platforms, which require most MMIO (except PCI devices) to be mapped as nGnRnE. Acked-by: Marc Zyngier <maz@xxxxxxxxxx> Acked-by: Will Deacon <will@xxxxxxxxxx> Signed-off-by: Hector Martin <marcan@xxxxxxxxx> --- arch/arm64/include/asm/io.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 5ea8656a2030..953b8703af60 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -169,6 +169,7 @@ extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size); #define ioremap(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) #define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC)) +#define ioremap_np(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRnE)) /* * PCI configuration space mapping function. -- 2.30.0
