Hey Mark, > > diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h > > index cd61239bae8c..54a22cb5b17b 100644 > > --- a/arch/arm64/include/asm/memory.h > > +++ b/arch/arm64/include/asm/memory.h > > @@ -152,6 +152,19 @@ > > #define MT_S2_FWB_NORMAL 6 > > #define MT_S2_FWB_DEVICE_nGnRE 1 > > > > +/* > > + * Default MAIR_ELx. MT_NORMAL_TAGGED is initially mapped as Normal memory and > > + * changed during __cpu_setup to Normal Tagged if the system supports MTE. > > + */ > > +#define MAIR_ELx_SET \ > > + (MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRnE, MT_DEVICE_nGnRnE) | \ > > + MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRE, MT_DEVICE_nGnRE) | \ > > + MAIR_ATTRIDX(MAIR_ATTR_DEVICE_GRE, MT_DEVICE_GRE) | \ > > + MAIR_ATTRIDX(MAIR_ATTR_NORMAL_NC, MT_NORMAL_NC) | \ > > + MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL) | \ > > + MAIR_ATTRIDX(MAIR_ATTR_NORMAL_WT, MT_NORMAL_WT) | \ > > + MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL_TAGGED)) > > Patch 7 initializes MAIR_EL2 with this directly rather than copying it > from MAIR_EL1, which means that MT_NORMAL_TAGGED will never be tagged > within the nVHE hyp code. > > Is that expected? I suspect it's worth a comment here (introduced in > patch 7), just to make that clear. Ouch, that didn't use to be there. In that case let's not build more implicit assumptions into the code. I'll pass MAIR_EL1 in kvm_nvhe_init_params. David
