Re: [PATCH v15 0/6] altera fpga area and fpga bus

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Hi Alan,

On Thu, Jan 21, 2016 at 5:42 PM, atull <atull@xxxxxxxxxxxxxxxxxxxxx> wrote:

> If you want to send me a Xilinx example of usage for me to include in that
> document, that would be useful also.  I think you might have sent me
> something a while ago, but I can't find it now.

Will do. I'll clean up some of my examples with an in-tree driver and
get back to you.
Having more examples never hurts.

Cheers,

Moritz
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