On Thu, 21 Jan 2016, Moritz Fischer wrote: > Hi Alan, > > On Wed, Jan 20, 2016 at 8:24 PM, <atull@xxxxxxxxxxxxxxxxxxxxx> wrote: > > From: Alan Tull <atull@xxxxxxxxxxxxxxxxxxxxx> > > > > For v15, I'm not using the FPGA Manager as the bus. I'm adding a FPGA Bus; > > the FPGA Manager and bridges go below it. > > > > I've gotten enough feedback that my proposals are Altera specific that I am > > going with that and changing the bindings to include an 'altr,' prefix. > > I hope this wasn't a misunderstanding of one of my earlier remarks. I > think the fpga-area & fpga bus > parts do apply to to Xilinx FPGAs, too. I think for fpga-area and > fpga-bus we could drop the 'altr' prefix. Yes, I would very much like to drop the altr prefix if we have general acceptance that this isn't all Altera specific. I'll need to rename altera-fpga-bus-fpga-area.txt to drop the 'altera-' prefix and clean up a little there. If you want to send me a Xilinx example of usage for me to include in that document, that would be useful also. I think you might have sent me something a while ago, but I can't find it now. > > > > > I've combined the bindings document and the other Documentation/fpga/ document > > and done a rewrite there. > > Looks great! > > I'll test it on hardware and look at the patches individually, Thank you! > > Cheers, > > Moritz > -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
