Re: [PATCH] Documentation/EDID: Fixed errors in sample code.

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On Sat, 1 Aug 2015 17:47:43 -0600
James Georgas <soulpa7ch@xxxxxxxxx> wrote:

> The vsync fields in the sample code are incorrectly adjusted. Remove the
> subtraction of 63 from the offset and pulsewidth fields, and update the
> associated comment.

So I'm not really in a position to judge the correctness of this patch.
It would have been good to copy Carsten, who was the author of that file;
I'll do so now.  Carsten, any thoughts on this one?

Thanks,

jon

From: James Georgas <soulpa7ch@xxxxxxxxx>
To: linux-doc@xxxxxxxxxxxxxxx
Subject: [PATCH] Documentation/EDID: Fixed errors in sample code.
Date: Sat, 1 Aug 2015 17:47:43 -0600
Newsgroups: gmane.linux.documentation

The vsync fields in the sample code are incorrectly adjusted. Remove the
subtraction of 63 from the offset and pulsewidth fields, and update the
associated comment.

The msbs4() macro is a complete gong show. Fix it to correctly mask and
bitshift its inputs into the target byte.

Update checksums in sample EDID source files to correct for edid.S changes.

Signed-off-by: James Georgas <soulpa7ch@xxxxxxxxx>
---
 Documentation/EDID/1024x768.S  |  2 +-
 Documentation/EDID/1280x1024.S |  2 +-
 Documentation/EDID/1600x1200.S |  2 +-
 Documentation/EDID/1680x1050.S |  2 +-
 Documentation/EDID/1920x1080.S |  2 +-
 Documentation/EDID/800x600.S   |  2 +-
 Documentation/EDID/edid.S      | 11 +++++++----
 7 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/Documentation/EDID/1024x768.S b/Documentation/EDID/1024x768.S
index 6f3e4b7..6ba29f3 100644
--- a/Documentation/EDID/1024x768.S
+++ b/Documentation/EDID/1024x768.S
@@ -39,6 +39,6 @@
 #define ESTABLISHED_TIMING2_BITS 0x08 /* Bit 3 -> 1024x768 @60 Hz */
 #define HSYNC_POL 0
 #define VSYNC_POL 0
-#define CRC 0x55
+#define CRC 0x66
 
 #include "edid.S"
diff --git a/Documentation/EDID/1280x1024.S b/Documentation/EDID/1280x1024.S
index bd9bef2a..b66cad5 100644
--- a/Documentation/EDID/1280x1024.S
+++ b/Documentation/EDID/1280x1024.S
@@ -39,6 +39,6 @@
 /* No ESTABLISHED_TIMINGx_BITS */
 #define HSYNC_POL 1
 #define VSYNC_POL 1
-#define CRC 0xa0
+#define CRC 0xb1
 
 #include "edid.S"
diff --git a/Documentation/EDID/1600x1200.S b/Documentation/EDID/1600x1200.S
index a45101c..b667b96 100644
--- a/Documentation/EDID/1600x1200.S
+++ b/Documentation/EDID/1600x1200.S
@@ -39,6 +39,6 @@
 /* No ESTABLISHED_TIMINGx_BITS */
 #define HSYNC_POL 1
 #define VSYNC_POL 1
-#define CRC 0x9d
+#define CRC 0xae
 
 #include "edid.S"
diff --git a/Documentation/EDID/1680x1050.S b/Documentation/EDID/1680x1050.S
index b0d7c69..2e7e93f 100644
--- a/Documentation/EDID/1680x1050.S
+++ b/Documentation/EDID/1680x1050.S
@@ -39,6 +39,6 @@
 /* No ESTABLISHED_TIMINGx_BITS */
 #define HSYNC_POL 1
 #define VSYNC_POL 1
-#define CRC 0x26
+#define CRC 0x37
 
 #include "edid.S"
diff --git a/Documentation/EDID/1920x1080.S b/Documentation/EDID/1920x1080.S
index 3084355e..66803d4 100644
--- a/Documentation/EDID/1920x1080.S
+++ b/Documentation/EDID/1920x1080.S
@@ -39,6 +39,6 @@
 /* No ESTABLISHED_TIMINGx_BITS */
 #define HSYNC_POL 1
 #define VSYNC_POL 1
-#define CRC 0x05
+#define CRC 0x16
 
 #include "edid.S"
diff --git a/Documentation/EDID/800x600.S b/Documentation/EDID/800x600.S
index 6644e26..11f8060f 100644
--- a/Documentation/EDID/800x600.S
+++ b/Documentation/EDID/800x600.S
@@ -36,6 +36,6 @@
 #define ESTABLISHED_TIMING1_BITS 0x01 /* Bit 0: 800x600 @ 60Hz */
 #define HSYNC_POL 1
 #define VSYNC_POL 1
-#define CRC 0xc2
+#define CRC 0xd3
 
 #include "edid.S"
diff --git a/Documentation/EDID/edid.S b/Documentation/EDID/edid.S
index 7ac0327..413e409 100644
--- a/Documentation/EDID/edid.S
+++ b/Documentation/EDID/edid.S
@@ -48,8 +48,11 @@
 	((((v1-'@')&0x1f)<<10)+(((v2-'@')&0x1f)<<5)+((v3-'@')&0x1f))
 #define swap16(v1) ((v1>>8)+((v1&0xff)<<8))
 #define msbs2(v1,v2) ((((v1>>8)&0x0f)<<4)+((v2>>8)&0x0f))
+
+/* pack bits 9,10 of v1 and v2, and bits 4,5 of v3 and v4 into a single byte: */
 #define msbs4(v1,v2,v3,v4) \
-	(((v1&0x03)>>2)+((v2&0x03)>>4)+((v3&0x03)>>6)+((v4&0x03)>>8))  
+	(((v1&0x300)>>2)+((v2&0x300)>>4)+((v3&0x30)>>2)+((v4&0x30)>>4))
+
 #define pixdpi2mm(pix,dpi) ((pix*25)/dpi)
 #define xsize pixdpi2mm(XPIX,DPI)
 #define ysize pixdpi2mm(YPIX,DPI)
@@ -200,9 +203,9 @@ y_msbs:		.byte	msbs2(YPIX,YBLANK)
 x_snc_off_lsb:	.byte	XOFFSET&0xff
 /* Horizontal sync pulse width pixels 8 lsbits (0-1023) */
 x_snc_pls_lsb:	.byte	XPULSE&0xff
-/* Bits 7-4 	Vertical sync offset lines 4 lsbits -63)
-   Bits 3-0 	Vertical sync pulse width lines 4 lsbits -63) */
-y_snc_lsb:	.byte	((YOFFSET-63)<<4)+(YPULSE-63)
+/* Bits 7-4 	Vertical sync offset lines 4 lsbits (0-63)
+   Bits 3-0 	Vertical sync pulse width lines 4 lsbits (0-63) */
+y_snc_lsb:	.byte	((YOFFSET&0x0f)<<4)+(YPULSE&0x0f)
 /* Bits 7-6 	Horizontal sync offset pixels 2 msbits
    Bits 5-4 	Horizontal sync pulse width pixels 2 msbits
    Bits 3-2 	Vertical sync offset lines 2 msbits
-- 
2.4.6
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