On Tue, Jul 15, 2014 at 6:00 PM, Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote:
>> + count =
>> + readw(timer_membase + ALTERA_TIMER_SNAPH_REG) << 16 |
>> + readw(timer_membase + ALTERA_TIMER_SNAPL_REG);
>
> So you're serious about having a new architecture with a timer
> implementation which cant read 32bit in one go? I'm impressed ...
This is to compatible with 16-bit and 32-bit processors. The older
version of Nios is 16-bit and Nios II is 32-bit.
But this timer core doesn't get updated after Nios is end of life.
>> +irqreturn_t timer_interrupt(int irq, void *dummy)
>> +{
>> + /* Clear the interrupt condition */
>> + writew(0, timer_membase + ALTERA_TIMER_STATUS_REG);
>> + nios2_timer_count += NIOS2_TIMER_PERIOD;
>> +
>> + profile_tick(CPU_PROFILING);
>> +
>> + xtime_update(1);
>> +
>> + update_process_times(user_mode(get_irq_regs()));
>> +
>> + return IRQ_HANDLED;
>
> Please use the clock events infrastructure. New users of the old style
> timer management are not welcome.
Okay, will change this.
>
>> +}
>> +
>> +static cycle_t nios2_timer_read(struct clocksource *cs)
>> +{
>> + unsigned long flags;
>> + u32 cycles;
>> + u32 tcn;
>> +
>> + local_irq_save(flags);
>> + tcn = NIOS2_TIMER_PERIOD - 1 - read_timersnapshot();
>> + cycles = nios2_timer_count;
>
> This is wrong and completely pointless. The core code takes care about
> the offset.
This offset is different from the core code. The core code is handling
cycle counter overlapping.
But this is for the offset between last timer interrupt counter and
current counter (read_timersnapshot()).
Thanks.
Regards
Ley Foon
--
To unsubscribe from this list: send the line "unsubscribe linux-doc" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
