Regarding atomic_t in per cpu areas: I am uncomfortable especially
because both locked and unlocked RMW write operations could be acting on
values in the same cacheline. I am concerned that the unlocked operation
could have an unpredictable result.
f.e. the following per cpu data structure
struct test {
atomic_t a;
int b;
} onecacheline;
Local cpu does
this_cpu_inc(onecacheline.b);
If this is racing with a remote cpus:
atomic_inc(percpu(&a, cpu))
then we have on x86 a increment operation with locked semantics racing
with an unlocked one on the same cacheline.
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