Hi Babu, On 22/01/2025 20:20, Babu Moger wrote: > Add the functionality to enable/disable AMD ABMC feature. > > AMD ABMC feature is enabled by setting enabled bit(0) in MSR > L3_QOS_EXT_CFG. When the state of ABMC is changed, the MSR needs > to be updated on all the logical processors in the QOS Domain. > > Hardware counters will reset when ABMC state is changed. > > The ABMC feature details are documented in APM listed below [1]. > [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming > Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth > Monitoring (ABMC). > diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h > index 05358e78147b..ca69f2e0909f 100644 > --- a/arch/x86/kernel/cpu/resctrl/internal.h > +++ b/arch/x86/kernel/cpu/resctrl/internal.h > @@ -658,4 +663,6 @@ void resctrl_file_fflags_init(const char *config, unsigned long fflags); > void rdt_staged_configs_clear(void); > bool closid_allocated(unsigned int closid); > int resctrl_find_cleanest_closid(void); > +int resctrl_arch_mbm_cntr_assign_set(struct rdt_resource *r, bool enable); > +bool resctrl_arch_mbm_cntr_assign_enabled(struct rdt_resource *r); > #endif /* _ASM_X86_RESCTRL_INTERNAL_H */ A minor nit - but could these be added to include/linux/resctrl.h instead? This is where they need to end up after the arch/fs split, and its harmless to do it from the beginning. Thanks, James
