> > Patches 1-5 are almost completely rewritten based around the new > > idea to give CMT and MBM their own "resource" instead of sharing > > one with L3 CAT. This removes the need for separate domain lists, > > and thus most of the churn of the previous version of this series. > > Very interesting. Do you think I would be able to create MBM files for > each memory controller without creating pointless L3 domains that show > up in schemata? Entries only show up in the schemata file for resources that are "alloc_capable". So you should be able to make as many rdt_hw_resource structures as you need that are "mon_capable", but not "alloc_capable" ... though making more than one such resource may explore untested areas of the code since there has historically only been one mon_capable resource. It looks like the resource id from the "rid" field is passed through to the "show" functions for MBM and CQM. This patch series splits the one resource that is marked as both mon_capable and alloc_capable into two. Maybe that's a useful cleanup, but maybe not a requirement for what you need. -Tony
