On 11/28/2023 9:20 AM, Borislav Petkov wrote:
On Thu, Nov 02, 2023 at 11:42:22AM +0000, Muralidhara M K wrote:
From: Muralidhara M K <muralidhara.mk@xxxxxxx>
AMD systems with Scalable MCA, each machine check error of a SMCA bank
type has an associated bit position in the bank's control (CTL) register.
Ontop of this. It is long overdue:
---
From: "Borislav Petkov (AMD)" <bp@xxxxxxxxx>
Date: Tue, 28 Nov 2023 14:37:56 +0100
Add some initial RAS documentation. The expectation is for this to
collect all the user-visible features for interacting with the RAS
features of the kernel.
Signed-off-by: Borislav Petkov (AMD) <bp@xxxxxxxxx>
---
Documentation/RAS/ras.rst | 26 ++++++++++++++++++++++++++
Documentation/index.rst | 1 +
2 files changed, 27 insertions(+)
create mode 100644 Documentation/RAS/ras.rst
diff --git a/Documentation/RAS/ras.rst b/Documentation/RAS/ras.rst
new file mode 100644
index 000000000000..2556b397cd27
--- /dev/null
+++ b/Documentation/RAS/ras.rst
@@ -0,0 +1,26 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+Reliability, Availability and Serviceability features
+=====================================================
+
+This documents different aspects of the RAS functionality present in the
+kernel.
+
+Error decoding
+---------------
+
+* x86
+
+Error decoding on AMD systems should be done using the rasdaemon tool:
+https://github.com/mchehab/rasdaemon/
+
+While the daemon is running, it would automatically log and decode
+errors. If not, one can still decode such errors by supplying the
+hardware information from the error::
+
+ $ rasdaemon -p --status <STATUS> --ipid <IPID> --smca
+
+Also, the user can pass particular family and model to decode the error
+string::
+
+ $ rasdaemon -p --status <STATUS> --ipid <IPID> --smca --family <CPU Family> --model <CPU Model> --bank <BANK_NUM>
diff --git a/Documentation/index.rst b/Documentation/index.rst
index 9dfdc826618c..36e61783437c 100644
--- a/Documentation/index.rst
+++ b/Documentation/index.rst
@@ -113,6 +113,7 @@ to ReStructured Text format, or are simply too old.
:maxdepth: 1
staging/index
+ RAS/ras
Translations
Thanks for starting this. I'll add some notes for the AMD Address
Translation Library in the next revision.
Thanks,
Yazen